Patents by Inventor Ayahito Uetake
Ayahito Uetake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230238774Abstract: A wavelength tunable laser device includes: a first mirror; a second mirror; an optical amplifier provided between the first mirror and the second mirror; a wavelength tunable filter provided between the first mirror and the second mirror; and an optical waveguide coupling the optical amplifier and the wavelength tunable filter. The optical waveguide includes a first waveguide formed with a first width and a second waveguide formed with a second width wider than the first width.Type: ApplicationFiled: December 14, 2022Publication date: July 27, 2023Applicant: Fujitsu Optical Components LimitedInventors: Hirotomo IZUMI, Suguru AKIYAMA, Ayahito UETAKE, Seimi SASAKI
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Patent number: 9948059Abstract: A semiconductor laser light source includes a semiconductor substrate formed of a first conductivity type semiconductor material, a lower cladding layer formed of the first conductivity type semiconductor material on the semiconductor substrate, a waveguide layer on the lower cladding layer, and an upper cladding layer formed of a second conductivity type semiconductor material on the waveguide layer. The waveguide layer includes a core area and rib areas thinner than the core area on either side of the core area. The core area has a quantum dot active layer, and the rib areas have no quantum dot layer. The waveguide layer forms a laser part having the core area with a constant width and a spot size converter having the core area with a taper width from a side adjacent to the laser part toward an end of the spot size converter.Type: GrantFiled: December 20, 2016Date of Patent: April 17, 2018Assignee: FUJITSU LIMITEDInventors: Tokuharu Kimura, Tsuyoshi Yamamoto, Kazumasa Takabayashi, Ayahito Uetake
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Patent number: 9819153Abstract: A semiconductor laser in a ridge waveguide structure includes: a semiconductor substrate; a lower cladding layer which is formed on the semiconductor substrate; an active layer and a semiconductor layer which are in parallel on the lower cladding layer and are connected with each other; a first upper cladding layer locally aligned above the active layer; a second upper cladding layer locally aligned above the semiconductor layer; and a third upper cladding layer locally aligned above the active layer to confine light which is guided in the active layer, wherein the semiconductor layer has a band gap which is larger than that of the active layer. According to this constitution, an optical semiconductor device with high reliability in which the ridge waveguide structure whose manufacturing is relatively easy is applied, and current diffusion and electrical crosstalk between lasers in the ridge waveguide structure are suppressed is enabled.Type: GrantFiled: January 29, 2016Date of Patent: November 14, 2017Assignee: FUJITSU LIMITEDInventors: Ayahito Uetake, Manabu Matsuda
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Patent number: 9728938Abstract: An optical semiconductor device includes: an active region which includes an active layer which produces light when current is injected therein, a first diffraction grating layer having a first diffraction grating with a prescribed grating period, and a phase shift portion formed within the first diffraction grating layer, wherein the phase shift portion provides a phase shift not smaller than 1.5? but not larger than 1.83?; and a distributed reflection mirror region which is optically coupled to a first end of the active region as viewed along a direction of an optical axis, and which includes a second diffraction grating which reflects the light produced by the active region back into the active region.Type: GrantFiled: September 15, 2014Date of Patent: August 8, 2017Assignee: FUJITSU LIMITEDInventors: Manabu Matsuda, Ayahito Uetake
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Publication number: 20170104309Abstract: A semiconductor laser light source includes a semiconductor substrate formed of a first conductivity type semiconductor material, a lower cladding layer formed of the first conductivity type semiconductor material on the semiconductor substrate, a waveguide layer on the lower cladding layer, and an upper cladding layer formed of a second conductivity type semiconductor material on the waveguide layer. The waveguide layer includes a core area and rib areas thinner than the core area on either side of the core area. The core area has a quantum dot active layer, and the rib areas have no quantum dot layer. The waveguide layer forms a laser part having the core area with a constant width and a spot size converter having the core area with a taper width from a side adjacent to the laser part toward an end of the spot size converter.Type: ApplicationFiled: December 20, 2016Publication date: April 13, 2017Applicant: FUJITSU LIMITEDInventors: Tokuharu KIMURA, Tsuyoshi Yamamoto, Kazumasa Takabayashi, Ayahito Uetake
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Publication number: 20160164259Abstract: A semiconductor laser in a ridge waveguide structure includes: a semiconductor substrate; a lower cladding layer which is formed on the semiconductor substrate; an active layer and a semiconductor layer which are in parallel on the lower cladding layer and are connected with each other; a first upper cladding layer locally aligned above the active layer; a second upper cladding layer locally aligned above the semiconductor layer; and a third upper cladding layer locally aligned above the active layer to confine light which is guided in the active layer, wherein the semiconductor layer has a band gap which is larger than that of the active layer. According to this constitution, an optical semiconductor device with high reliability in which the ridge waveguide structure whose manufacturing is relatively easy is applied, and current diffusion and electrical crosstalk between lasers in the ridge waveguide structure are suppressed is enabled.Type: ApplicationFiled: January 29, 2016Publication date: June 9, 2016Applicant: FUJITSU LIMITEDInventors: Ayahito Uetake, Manabu Matsuda
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Publication number: 20150093121Abstract: An optical semiconductor device includes: an active region which includes an active layer which produces light when current is injected therein, a first diffraction grating layer having a first diffraction grating with a prescribed grating period, and a phase shift portion formed within the first diffraction grating layer, wherein the phase shift portion provides a phase shift not smaller than 1.5? but not larger than 1.83?; and a distributed reflection mirror region which is optically coupled to a first end of the active region as viewed along a direction of an optical axis, and which includes a second diffraction grating which reflects the light produced by the active region back into the active region.Type: ApplicationFiled: September 15, 2014Publication date: April 2, 2015Applicant: FUJITSU LIMITEDInventors: Manabu Matsuda, Ayahito Uetake
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Patent number: 8987117Abstract: A semiconductor optical integrated device includes a first semiconductor optical device formed over a (001) plane of a substrate and a second semiconductor optical device which is formed over the (001) plane of the substrate in a (110) orientation from the first semiconductor optical device and which is optically connected to the first semiconductor optical device. The first semiconductor optical device includes a first core layer and a first clad layer which is formed over the first core layer and which has a crystal surface on a side on a second semiconductor optical device side that forms an angle ? greater than or equal to 55 degrees and less than or equal to 90 degrees with the (001) plane.Type: GrantFiled: August 14, 2013Date of Patent: March 24, 2015Assignee: Fujitsu LimitedInventors: Shigekazu Okumura, Mitsuru Ekawa, Shuichi Tomabechi, Ayahito Uetake
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Patent number: 8938138Abstract: An optical semiconductor device includes: a waveguide unit which is formed on a semiconductor substrate including a (100) plane and includes a core layer which propagates light; a spot size converting unit which is formed on the semiconductor substrate, is optically connected to the waveguide unit, and converts diameter of light propagated; and a pair of terraces which are formed on the semiconductor substrate and are opposed to each other while sandwiching the spot size converting unit. Interval between opposed units which are opposed to each other while sandwiching the spot size converting unit in the pair of terraces changes, and each of the opposed units includes a part whose orientation tilts to a [0-11] direction with respect to a [011] direction, and position of an upper end of the spot size converting unit is higher than that of an upper end of the waveguide unit.Type: GrantFiled: December 6, 2012Date of Patent: January 20, 2015Assignee: Fujitsu LimitedInventors: Ayahito Uetake, Kazumasa Takabayashi
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Publication number: 20130330867Abstract: A semiconductor optical integrated device includes a first semiconductor optical device formed over a (001) plane of a substrate and a second semiconductor optical device which is formed over the (001) plane of the substrate in a (110) orientation from the first semiconductor optical device and which is optically connected to the first semiconductor optical device. The first semiconductor optical device includes a first core layer and a first clad layer which is formed over the first core layer and which has a crystal surface on a side on a second semiconductor optical device side that forms an angle ? greater than or equal to 55 degrees and less than or equal to 90 degrees with the (001) plane.Type: ApplicationFiled: August 14, 2013Publication date: December 12, 2013Applicant: FUJITSU LIMITEDInventors: Shigekazu OKUMURA, Mitsuru EKAWA, Shuichi TOMABECHI, Ayahito UETAKE
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Patent number: 8565279Abstract: A semiconductor optical integrated device includes a first semiconductor optical device formed over a (001) plane of a substrate and a second semiconductor optical device which is formed over the (001) plane of the substrate in a (110) orientation from the first semiconductor optical device and which is optically connected to the first semiconductor optical device. The first semiconductor optical device includes a first core layer and a first clad layer which is formed over the first core layer and which has a crystal surface on a side on a second semiconductor optical device side that forms an angle ? greater than or equal to 55 degrees and less than or equal to 90 degrees with the (001) plane.Type: GrantFiled: September 12, 2012Date of Patent: October 22, 2013Assignee: Fujitsu LimitedInventors: Shigekazu Okumura, Mitsuru Ekawa, Shuichi Tomabechi, Ayahito Uetake
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Publication number: 20130010824Abstract: A semiconductor optical integrated device includes a first semiconductor optical device formed over a (001) plane of a substrate and a second semiconductor optical device which is formed over the (001) plane of the substrate in a (110) orientation from the first semiconductor optical device and which is optically connected to the first semiconductor optical device. The first semiconductor optical device includes a first core layer and a first clad layer which is formed over the first core layer and which has a crystal surface on a side on a second semiconductor optical device side that forms an angle ? greater than or equal to 55 degrees and less than or equal to 90 degrees with the (001) plane.Type: ApplicationFiled: September 12, 2012Publication date: January 10, 2013Applicant: FUJITSU LIMITEDInventors: Shigekazu OKUMURA, Mitsuru Ekawa, Shuichi Tomabechi, Ayahito Uetake
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Patent number: 7627212Abstract: An optical integrated device includes an optical waveguide structure formed on a semiconductor substrate and including a plurality of first channel optical waveguide portions, an optical coupler portion and a second channel optical waveguide portion, a burying layer formed from a semi-insulating semiconductor material and burying the optical waveguide structure therein such that an upper portion thereof forms a flat face and a side portion thereof forms an inclined face having a predetermined angle with respect to the semiconductor substrate, and a plurality of dummy structure bodies provided over a desired region in the proximity of at least an output side of the optical coupler portion so that radiation light from the optical coupler portion is spatially separated from signal light propagating along the second channel optical waveguide portion. The plural dummy structure bodies are provided discretely so as to be buried flat by the burying layer.Type: GrantFiled: July 29, 2008Date of Patent: December 1, 2009Assignee: Fujitsu LimitedInventors: Shinsuke Tanaka, Kazumasa Takabayashi, Ayahito Uetake
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Patent number: 7539385Abstract: An optical semiconductor, includes a semiconductor substrate having a (100) principal surface, a waveguide mesa stripe formed on a first region of the semiconductor substrate, the waveguide mesa stripe guiding a light therethrough; a plurality of dummy mesa patterns formed on the semiconductor substrate in a second region at a forward side of the first region, and a semi-insulating buried semiconductor layer formed on the semiconductor substrate so as to cover the first and second regions continuously, the semi-insulating buried semiconductor layer filling a right side and a left side of the waveguide mesa stripe in the first region and a gap between the plurality of dummy mesa patterns in the second region.Type: GrantFiled: October 31, 2007Date of Patent: May 26, 2009Assignees: Fujitsu Limited, Eudyna Devices Inc.Inventors: Ayahito Uetake, Tatsuya Takeuchi
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Publication number: 20090052834Abstract: An optical integrated device includes an optical waveguide structure formed on a semiconductor substrate and including a plurality of first channel optical waveguide portions, an optical coupler portion and a second channel optical waveguide portion, a burying layer formed from a semi-insulating semiconductor material and burying the optical waveguide structure therein such that an upper portion thereof forms a flat face and a side portion thereof forms an inclined face having a predetermined angle with respect to the semiconductor substrate, and a plurality of dummy structure bodies provided over a desired region in the proximity of at least an output side of the optical coupler portion so that radiation light from the optical coupler portion is spatially separated from signal light propagating along the second channel optical waveguide portion. The plural dummy structure bodies are provided discretely so as to be buried flat by the burying layer.Type: ApplicationFiled: July 29, 2008Publication date: February 26, 2009Applicant: FUJITSU LIMITEDInventors: Shinsuke TANAKA, Kazumasa TAKABAYASHI, Ayahito UETAKE
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Patent number: 7456422Abstract: A semiconductor device including quantum dots comprises a barrier layer of a semiconductor crystal having a first lattice constant and a quantum dot layer including a plurality of quantum dots of a semiconductor crystal having a second lattice constant formed on the barrier layer and a side barrier layer of a semiconductor crystal having a third lattice constant, which is formed in contact with the side faces of the plurality of quantum dots, in which the barrier layer, the quantum dots and the side barrier layer are configured so that the difference between the values of the first lattice constant and the second lattice constant has a sign opposite to that of the difference between values of the first lattice constant and the third lattice constant.Type: GrantFiled: March 3, 2006Date of Patent: November 25, 2008Assignees: Fujitsu Limited, The University of TokyoInventors: Ayahito Uetake, Hiroji Ebe, Kenichi Kawaguchi
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Publication number: 20080175549Abstract: An optical semiconductor, includes a semiconductor substrate having a (100) principal surface, a waveguide mesa stripe formed on a first region of the semiconductor substrate, the waveguide mesa stripe guiding a light therethrough; a plurality of dummy mesa patterns formed on the semiconductor substrate in a second region at a forward side of the first region, and a semi-insulating buried semiconductor layer formed on the semiconductor substrate so as to cover the first and second regions continuously, the semi-insulating buried semiconductor layer filling a right side and a left side of the waveguide mesa stripe in the first region and a gap between the plurality of dummy mesa patterns in the second region.Type: ApplicationFiled: October 31, 2007Publication date: July 24, 2008Applicants: FUJITSU LIMITED, EUDYNA DEVICES INC.Inventors: Ayahito Uetake, Tatsuya Takeuchi
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Publication number: 20060220001Abstract: A semiconductor device including quantum dots comprises a barrier layer of a semiconductor crystal having a first lattice constant and a quantum dot layer including a plurality of quantum dots of a semiconductor crystal having a second lattice constant formed on the barrier layer and a side barrier layer of a semiconductor crystal having a third lattice constant, which is formed in contact with the side faces of the plurality of quantum dots, in which the barrier layer, the quantum dots and the side barrier layer are configured so that the difference between the values of the first lattice constant and the second lattice constant has a sign opposite to that of the difference between values of the first lattice constant and the third lattice constant.Type: ApplicationFiled: March 3, 2006Publication date: October 5, 2006Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYOInventors: Ayahito Uetake, Hiroji Ebe, Kenichi Kawaguchi