Patents by Inventor Ayaka TAKEOKA

Ayaka TAKEOKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11917829
    Abstract: A semiconductor memory device comprises a semiconductor substrate comprising a first region, a second region, and a third region provided therebetween. The first region comprises: first conductive layers; a first semiconductor layer facing the first conductive layers; and a second semiconductor layer connected to the first semiconductor layer. The second region comprises: a third semiconductor layer and fourth semiconductor layer; and a second conductive layer electrically connected to the third semiconductor layer, the fourth semiconductor layer, and the semiconductor substrate. The third region comprises a fifth semiconductor layer and sixth semiconductor layer that are formed continuously with the second semiconductor layer and the third semiconductor layer or fourth semiconductor layer, and extend in a second direction. The third region comprises first and second portions aligned alternately in the second direction.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: February 27, 2024
    Assignee: Kioxia Corporation
    Inventors: Ayaka Takeoka, Yoshitaka Kubota
  • Publication number: 20220254801
    Abstract: A semiconductor memory device comprises a semiconductor substrate comprising a first region, a second region, and a third region provided therebetween. The first region comprises: first conductive layers; a first semiconductor layer facing the first conductive layers; and a second semiconductor layer connected to the first semiconductor layer. The second region comprises: a third semiconductor layer and fourth semiconductor layer; and a second conductive layer electrically connected to the third semiconductor layer, the fourth semiconductor layer, and the semiconductor substrate. The third region comprises a fifth semiconductor layer and sixth semiconductor layer that are formed continuously with the second semiconductor layer and the third semiconductor layer or fourth semiconductor layer, and extend in a second direction. The third region comprises first and second portions aligned alternately in the second direction.
    Type: Application
    Filed: August 26, 2021
    Publication date: August 11, 2022
    Applicant: Kioxia Corporation
    Inventors: Ayaka TAKEOKA, Yoshitaka KUBOTA