Patents by Inventor Ayako Furesawa

Ayako Furesawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11798964
    Abstract: In an apparatus, effective pixels of C×A-number composed of pixel rows of A-number and pixel columns of C-number or composed of the pixel rows of the C-number and the pixel columns of the A-number are arrayed in an effective pixel area of a chip, and images of a number not more than B-number are output from the chip for one second, wherein A, B and C are positive integers. The adhesive includes first, second, third, and fourth portions placed between a base body and the chip. The first and second portions are positioned between the third and fourth portions in the array direction of the pixel rows or columns. A gap is provided between the first and second portions, between the second and third portions, and between the first and fourth portions. The first and second portions are positioned between the effective pixel area and the base body.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: October 24, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Ayako Furesawa
  • Patent number: 11784201
    Abstract: A package comprising a base is provided. An electrode and a concave portion are arranged on a first surface of the package. The base comprises a second surface on a side opposite to the first surface and a third surface. The first surface is positioned between the second and third surfaces. The electrode comprises an electrode upper surface and an electrode side surface. The concave portion comprises a concave side surface and a bottom surface positioned closer to the second surface than the concave side surface. The electrode upper surface is arranged at a position further away from the virtual plane than the bottom surface. The electrode side surface is continuous with the concave side surface. The concave portion further comprises a second side surface which faces the concave side surface and is continuous with the third surface.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: October 10, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuya Notsu, Ayako Furesawa
  • Publication number: 20220415960
    Abstract: A disclosed method of manufacturing a semiconductor device includes singulating a bonded substrate including a first substrate provided with an interconnection structure layer and a first bonding layer and a second substrate provided with a second bonding layer opposed to the first bonding layer into a plurality of semiconductor devices. The bonded substrate includes functional element regions and a scribe region in a plan view. The singulating includes forming a groove in the scribe region, and cutting the bonded substrate in a region outside an inner side surface of the groove. The groove is formed penetrating one of the first substrate and the second substrate, the interconnection structure layer, and the first and second bonding layers. The groove extends from the one of the first substrate and the second substrate to a position deeper than all interconnection layers provided between the first and second substrates.
    Type: Application
    Filed: June 15, 2022
    Publication date: December 29, 2022
    Inventors: Ayako Furesawa, Yoshinori Tateishi, Toshio Tomiyoshi, Takahiro Hachisu
  • Publication number: 20220278149
    Abstract: A package comprising a base is provided. An electrode and a concave portion are arranged on a first surface of the package. The base comprises a second surface on a side opposite to the first surface and a third surface. The first surface is positioned between the second and third surfaces. The electrode comprises an electrode upper surface and an electrode side surface. The concave portion comprises a concave side surface and a bottom surface positioned closer to the second surface than the concave side surface. The electrode upper surface is arranged at a position further away from the virtual plane than the bottom surface. The electrode side surface is continuous with the concave side surface. The concave portion further comprises a second side surface which faces the concave side surface and is continuous with the third surface.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 1, 2022
    Inventors: Kazuya Notsu, Ayako Furesawa
  • Publication number: 20210111208
    Abstract: In an apparatus, effective pixels of C×A-number composed of pixel rows of A-number and pixel columns of C-number or composed of the pixel rows of the C-number and the pixel columns of the A-number are arrayed in an effective pixel area of a chip, and images of a number not more than B-number are output from the chip for one second, wherein A, B and C are positive integers. The adhesive includes first, second, third, and fourth portions placed between a base body and the chip. The first and second portions are positioned between the third and fourth portions in the array direction of the pixel rows or columns. A gap is provided between the first and second portions, between the second and third portions, and between the first and fourth portions. The first and second portions are positioned between the effective pixel area and the base body.
    Type: Application
    Filed: October 6, 2020
    Publication date: April 15, 2021
    Inventor: Ayako Furesawa