Patents by Inventor Ayana KIMOTSUKI

Ayana KIMOTSUKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220383657
    Abstract: Power consumption of a circuit which makes a determination is reduced. The accuracy of a system which makes a determination is improved. The safety of a target object which is monitored by a sensor element is increased. A system which easily monitors a target object is provided. A semiconductor device includes a detection circuit having a function of analyzing first data and making a first determination of selecting a first value or a second value, a first determination circuit and a second determination circuit having a function of performing feature extraction of an image, a power supply circuit, and a power management unit. The power management unit has a function of allowing a voltage to be supplied from the power supply circuit to the first determination circuit in the case where the first value is selected by the first determination. The first determination circuit has a function of analyzing the first data and making a second determination.
    Type: Application
    Filed: September 22, 2020
    Publication date: December 1, 2022
    Inventors: Seiko INOUE, Ayana KIMOTSUKI, Atsuya TOKINOSU
  • Publication number: 20220292332
    Abstract: A system with high processing speed and low power consumption is provided. The system includes an imaging device and an arithmetic circuit. The imaging device includes an imaging portion, a first memory portion, and an arithmetic portion, and the arithmetic circuit includes a second memory portion. The imaging portion has a function of converting light reflected by an external subject into image data, and the first memory portion has a function of storing the image data and a first filter for performing first convolutional processing in a first layer of a neural network. The arithmetic portion has a function of performing the first convolutional processing using the image data and the first filter to generate first data. The second memory portion has a function of storing the first data and a plurality of filters. The arithmetic circuit has a function of generating a depth map of the image data.
    Type: Application
    Filed: July 30, 2020
    Publication date: September 15, 2022
    Inventors: Yusuke KOUMURA, Koki INOUE, Ayana KIMOTSUKI, Fumiya NAGASHIMA