Abstract: A semiconductor device includes: a first trench provided from the upper surface of a first impurity layer to the inside of a first semiconductor layer, a second trench provided from the upper surface of a second impurity layer to a position lower than the lower surface of the first semiconductor layer; a second semiconductor layer of a first conductivity type provided on the surface layer of the first impurity layer and disposed to be interposed between the first trench and a third impurity layer in a plan view; and a third semiconductor layer of the first conductivity type provided in the surface layer of the second impurity layer and disposed to be interposed between the second trench and the third impurity layer in the plan view.

Abstract: A semiconductor device according to the present disclosure includes a P layer, an insulating film, an electrode, a plurality of P- layers arranged on a side of a termination region of the P layer, an N- layer, an N++ layer, an insulating film, an electrode, a high permittivity layer disposed at least on the P- layers, and a low permittivity layer disposed on the high permittivity layer, and a distance between an end on a side of an active region of the insulating film and an end on a side of the termination region of one of the P- layers located farthest from the active region is more than µm and µm or less, and a distance between the end on the side of the active region of the insulating film and an end on a side of the active region of the electrode is 50 µm or more.

Abstract: Provided is a semiconductor device capable of suppressing breakdown of the semiconductor device by a full depletion of a semiconductor layer. The semiconductor device includes: a first semiconductor layer of a first conductivity type provided on a second main surface side of a semiconductor base body; a second semiconductor layer of the first conductivity type having a first conductivity type impurity concentration lower than that of the first semiconductor layer and provided closer to a first main surface than the first semiconductor layer is; and a third semiconductor layer of a second conductivity type provided closer to the first main surface than the second semiconductor layer is. An impurity concentration distribution of the third semiconductor layer with respect to thickness direction of the semiconductor base body has a plurality of peaks. A thickness W of the third semiconductor layer satisfies a certain condition.

Abstract: Provided is a semiconductor device including: a semiconductor substrate having at least first and second semiconductor layers of a first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of the first conductivity type selectively provided in an upper layer portion of the third semiconductor layer; a trench gate passing through the fourth and third semiconductor layers in a thickness direction to penetrate into the second semiconductor layer; a first dummy trench gate passing through the third and second semiconductor layer in the thickness direction to penetrate into the first semiconductor layer; and a second dummy trench gate passing through the third semiconductor layer in the thickness direction to penetrate into the second semiconductor layer, the first and second dummy trench gates being disposed between the trench gates arrayed and being electrically connected to a first main electrode.

Abstract: An insulation film includes a first opening portion in at least one of a cell region and a termination region, and a second opening portion in an interface region. The second opening portion has an opening ratio lower than an opening ratio of the first opening portion. The semiconductor device includes a first impurity layer of a second conductivity type, and a second impurity layer of the second conductivity type. The first impurity layer is disposed on a surface of a semiconductor substrate below the first opening portion. The second impurity layer has impurity concentration lower than impurity concentration of the first impurity layer, and is disposed on the surface of the semiconductor substrate below the second opening portion.