Patents by Inventor Aymeric S. Vial

Aymeric S. Vial has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8874920
    Abstract: Embodiments provide systems and methods to optimize signature verification time for a cryptographic cache. Time is reduced by eliminating at least some of the duplicative application of cryptographic primitives. In some embodiments, systems and methods for signature verification comprise obtaining a signature which was previously generated using an asymmetrical cryptographic scheme, and determining whether an identical signature has previously been stored in a signature cache. If an identical signature has been previously stored in the signature cache, retrieving previously generated results corresponding to the previously stored identical signature, the results a consequence of application of cryptographic primitives of the asymmetrical cryptographic scheme corresponding to the identical signature. The results are forwarded to a signature verifier. In at least some embodiments, at least one of these functions occurs in a secure execution environment.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: October 28, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Frederic P. R. Amiel, Aymeric S. Vial
  • Patent number: 8347112
    Abstract: In at least some embodiments, an electronic device comprises a processor and an encryption/decryption (E/D) engine coupled to the processor via a bus. The E/D engine selectively operates in a first mode and a second mode. For the first mode, an E/D engine output is provided to the bus. For the second mode, the E/D engine output is not provided to the bus and is accessible only to the E/D engine.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: January 1, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Frederic P. R. Amiel, Aymeric S. Vial, Jean-Yves Simon
  • Publication number: 20090282264
    Abstract: In at least some embodiments, an electronic device comprises a processor and an encryption/decryption (E/D) engine coupled to the processor via a bus. The E/D engine selectively operates in a first mode and a second mode. For the first mode, an E/D engine output is provided to the bus. For the second mode, the E/D engine output is not provided to the bus and is accessible only to the E/D engine.
    Type: Application
    Filed: February 17, 2009
    Publication date: November 12, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Frederic P. R. AMIEL, Aymeric S. VIAL, Jean-Yves SIMON
  • Publication number: 20090217050
    Abstract: Embodiments provide systems and methods to optimize signature verification time for a cryptographic cache. Time is reduced by eliminating at least some of the duplicative application of cryptographic primitives. In some embodiments, systems and methods for signature verification comprise obtaining a signature which was previously generated using an asymmetrical cryptographic scheme, and determining whether an identical signature has previously been stored in a signature cache. If an identical signature has been previously stored in the signature cache, retrieving previously generated results corresponding to the previously stored identical signature, the results a consequence of application of cryptographic primitives of the asymmetrical cryptographic scheme corresponding to the identical signature. The results are forwarded to a signature verifier. In at least some embodiments, at least one of these functions occurs in a secure execution environment.
    Type: Application
    Filed: December 19, 2008
    Publication date: August 27, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Frederic P. R. AMIEL, Aymeric S. Vial