Patents by Inventor Ayumu Sato

Ayumu Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9120776
    Abstract: The present invention provides a fused heterocyclic compound having an ROR?t inhibitory action. The present invention relates to a compound represented by the formula (I?): wherein each symbol is as defined in the specification, provided that 2-(2-((4-cyanophenyl)amino)-2-oxoethoxy)-N-(9-ethyl-9H-carbazol-3-yl)acetamide and N-(4-cyanophenyl)-N?-(9-ethyl-9H-carbazol-3-yl)-3-methylpentanediamide are excluded, or a thereof.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: September 1, 2015
    Assignee: Takeda Pharmaceutical Company Limited
    Inventors: Satoshi Yamamoto, Junya Shirai, Yoshiyuki Fukase, Yoshihide Tomata, Ayumu Sato, Atsuko Ochida, Kazuko Yonemori, Hideyuki Nakagawa
  • Patent number: 9117590
    Abstract: A laminated ceramic electronic component has electrode layers stacked with ceramic layers, where the thickness of each electrode layer is controlled to 0.5 ?m or less and the average size of crystal grains constituting the electrode layer is controlled to 0.1 ?m or less. The occurrence of structural defects in the laminated ceramic electronic component can be suppressed and high continuity of the electrode layers stacked with the ceramic layers is ensured.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: August 25, 2015
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Yukihiro Konishi, Yusuke Kowase, Kazumichi Hiroi, Kotaro Mizuno, Ayumu Sato
  • Publication number: 20150179681
    Abstract: A semiconductor device includes: a transistor having an oxide semiconductor film; and a retention capacitor having a first conductive film and a second conductive film, the first conductive film containing an oxide material and being in contact with the oxide semiconductor film, and the second conductive film facing the first conductive film with an insulating film in between.
    Type: Application
    Filed: November 25, 2014
    Publication date: June 25, 2015
    Inventor: Ayumu Sato
  • Publication number: 20150162399
    Abstract: A semiconductor device includes: a retention capacitor having an oxide semiconductor film and a conductive film with an insulating film in between; and a metal film provided to be in contact with a surface of the oxide semiconductor film opposed to a surface facing the conductive film, the metal film being at least partially oxidized.
    Type: Application
    Filed: October 9, 2014
    Publication date: June 11, 2015
    Applicant: SONY CORPORATION
    Inventor: Ayumu Sato
  • Patent number: 8946104
    Abstract: A dielectric ceramic whose primary component is an ABO3 compound (A contains Ba and B contains Ti) has a per-layer thickness of approx. 0.5 ?m or less, where the volume ratio to all dielectric sintered grains of those whose grain size is in a range of 0.02 ?m to 0.15 ?m is adjusted to a grain size distribution of 1% to 10%. High dielectric constant and high reliability can be achieved at the same time with the dielectric ceramic.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: February 3, 2015
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Yukihiro Konishi, Yusuke Kowase, Kazumichi Hiroi, Kotaro Mizuno, Ayumu Sato
  • Publication number: 20140291639
    Abstract: Provided is a semiconductor device that includes: a transistor; an oxide semiconductor film; a first conductive film electrically connected to the oxide semiconductor film; and a first insulating film provided between the first conductive film and the oxide semiconductor film.
    Type: Application
    Filed: March 10, 2014
    Publication date: October 2, 2014
    Applicant: Sony Corporation
    Inventors: Yasuhiro TERAI, Takahide ISHII, Ayumu SATO
  • Publication number: 20140268879
    Abstract: A waveguide light diffuser panel is disclosed that diffuses source lights and transmits ambient light. Conventional waveguide light diffusers diffuse all light and therefore provide a hazy outcome. In manufacturing a waveguide transparent diffuser, a printing method, such as inkjet printing, may be used. In this method, dot micro-lenses are formed on one side of a panel, which cover a portion of the panel in a staggered or random arrangement. The other side of the panel is coated with an anti-reflective material, or the shape of the panel may be concave. The dot shape is designed for efficient reflection of the incident light, as opposed to conventional hazy diffusers in which the reflection efficiency is low. High reflection efficiency in this case compensates for the reduced dot coverage.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Yosuke MIZUYAMA, Nathan HARRISON, Ayumu SATO
  • Publication number: 20140228409
    Abstract: The present invention provides a fused heterocyclic compound having an ROR?t inhibitory action. The present invention relates to a compound represented by the formula (I?): wherein each symbol is as defined in the specification, provided that 2-(2-((4-cyanophenyl)amino)-2-oxoethoxy)-N-(9-ethyl-9H-carbazol-3-yl)acetamide and N-(4-cyanophenyl)-N?-(9-ethyl-9H-carbazol-3-yl)-3-methylpentanediamide are excluded, or a salt thereof.
    Type: Application
    Filed: September 21, 2012
    Publication date: August 14, 2014
    Inventors: Satoshi Yamamoto, Junya Shirai, Yoshiyuki Fukase, Yoshihide Tomata, Ayumu Sato, Atsuko Ochida, Kazuko Yonemori, Hideyuki Nakagawa
  • Publication number: 20140163001
    Abstract: Provided is a heterocyclic compound having an ROR?t inhibitory activity.
    Type: Application
    Filed: July 27, 2012
    Publication date: June 12, 2014
    Applicant: Takeda Pharmaceutical Company Limited
    Inventors: Satoshi Yamamoto, Junya Shirai, Atsuko Ochida, Yoshiyuki Fukase, Yoshihide Tomata, Ayumu Sato, Shotaro Miura, Kazuko Yonemori, Ryokichi Koyama
  • Patent number: 8624240
    Abstract: Provided is a top gate thin film transistor, including on a substrate: a source electrode layer; a drain electrode layer; an oxide semiconductor layer; a gate insulating layer; a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and a protective layer containing hydrogen, in which: the gate insulating layer is formed on a channel region of the oxide semiconductor layer; the gate electrode layer is formed on the gate insulating layer; and the protective layer is formed on the gate electrode layer.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: January 7, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ayumu Sato, Hideya Kumomi, Hisato Yabuta, Ryo Hayashi, Yasuyoshi Takai
  • Publication number: 20130342956
    Abstract: A laminated ceramic electronic component has electrode layers stacked with ceramic layers, where the thickness of each electrode layer is controlled to 0.5 ?m or less and the average size of crystal grains constituting the electrode layer is controlled to 0.1 ?m or less. The occurrence of structural defects in the laminated ceramic electronic component can be suppressed and high continuity of the electrode layers stacked with the ceramic layers is ensured.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 26, 2013
    Inventors: Yukihiro KONISHI, Yusuke KOWASE, Kazumichi HIROI, Kotaro MIZUNO, Ayumu SATO
  • Publication number: 20130342957
    Abstract: A dielectric ceramic whose primary component is an ABO3 compound (A contains Ba and B contains Ti) has a per-layer thickness of approx. 0.5 ?m or less, where the volume ratio to all dielectric sintered grains of those whose grain size is in a range of 0.02 ?m to 0.15 ?m is adjusted to a grain size distribution of 1% to 10%. High dielectric constant and high reliability can be achieved at the same time with the dielectric ceramic.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 26, 2013
    Inventors: Yukihiro KONISHI, Yusuke KOWASE, Kazumichi HIROI, Kotaro MIZUNO, Ayumu SATO
  • Publication number: 20130316521
    Abstract: The present invention provides a method for producing a silicon wafer including a step of, after growing the oxide film on one surface of a raw material silicon wafer by chemical-vapor deposition, performing double-side polishing of the raw material silicon wafer in such a manner that a suede polishing pad or a velour polishing pad with an asker-C rubber hardness of 50° or more but less than 90° is used for the oxide-film surface.
    Type: Application
    Filed: February 9, 2012
    Publication date: November 28, 2013
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Takuya Sasaki, Hiromasa Hashimoto, Kazuya Sato, Ayumu Sato
  • Patent number: 8502217
    Abstract: Provided is an oxide semiconductor device including an oxide semiconductor layer and an insulating layer coming into contact with the oxide semiconductor layer in which the insulating layer includes: a first insulating layer coming into contact with an oxide semiconductor, having a thickness of 50 nm or more, and including an oxide containing Si and O; a second insulating layer coming into contact with the first insulating layer, having a thickness of 50 nm or more, and including a nitride containing Si and N; and a third insulating layer coming into contact with the second insulating layer, the first insulating layer and the second insulating layer having hydrogen contents of 4×1021 atoms/cm3 or less, and the third insulating layer having a hydrogen content of more than 4×1021 atoms/cm3.
    Type: Grant
    Filed: November 27, 2008
    Date of Patent: August 6, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ayumu Sato, Ryo Hayashi, Hisato Yabuta, Tomohiro Watanabe
  • Patent number: 8481569
    Abstract: The present invention aims to provide an iminopyridine derivative compound having an ?1Dadrenergic receptor antagonistic action, which is useful as an agent for the prophylaxis or treatment of a lower urinary tract disease and the like. The present invention provides a compound represented by the formula wherein each symbol is as defined in the specification, or a salt thereof.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: July 9, 2013
    Assignee: Takeda Pharmaceutical Company Limited
    Inventors: Masato Yoshida, Nobuki Sakauchi, Ayumu Sato
  • Patent number: 8445902
    Abstract: Provided are a coplanar structure thin film transistor that allows a threshold voltage to change only a little under electric stress, and a method of manufacturing the same. The thin film transistor includes on a substrate at least: a gate electrode; a gate insulating layer; an oxide semiconductor layer including a source electrode, a drain electrode, and a channel region; a channel protection layer; and an interlayer insulating layer. The channel protection layer includes one or more layers, the layer in contact with the oxide semiconductor layer among the one or more layers being made of an insulating material containing oxygen, ends of the channel protection layer are thinner than a central part of the channel protection layer, the interlayer insulating layer contains hydrogen, and regions of the oxide semiconductor layer that are in direct contact with the interlayer insulating layer form the source electrode and the drain electrode.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: May 21, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ayumu Sato, Ryo Hayashi, Hisato Yabuta, Masafumi Sano
  • Patent number: 8344373
    Abstract: To achieve, in an oxide semiconductor thin layer transistor, both the stability of threshold voltage against electric stress and suppression of variation in the threshold voltage in a transfer characteristic. A thin film transistor includes an oxide semiconductor layer and a gate insulating layer disposed so as to be in contact with the oxide semiconductor layer, wherein the oxide semiconductor layer contains hydrogen atoms and includes at least two regions that function as active layers of the oxide semiconductor and have different average hydrogen concentrations in the layer thickness direction; and when the regions functioning as the active layers of the oxide semiconductor are sequentially defined as, from the side of the gate insulating layer, a first region and a second region, the average hydrogen concentration of the first region is lower than the average hydrogen concentration of the second region.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: January 1, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ayumu Sato, Hideya Kumomi, Ryo Hayashi, Tomohiro Watanabe
  • Publication number: 20120032173
    Abstract: Provided is a top gate thin film transistor, including on a substrate: a source electrode layer; a drain electrode layer; an oxide semiconductor layer; a gate insulating layer; a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and a protective layer containing hydrogen, in which: the gate insulating layer is formed on a channel region of the oxide semiconductor layer; the gate electrode layer is formed on the gate insulating layer; and the protective layer is formed on the gate electrode layer.
    Type: Application
    Filed: July 21, 2011
    Publication date: February 9, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ayumu Sato, Hideya Kumomi, Hisato Yabuta, Ryo Hayashi, Yasuyoshi Takai
  • Publication number: 20110073856
    Abstract: To achieve, in an oxide semiconductor thin layer transistor, both the stability of threshold voltage against electric stress and suppression of variation in the threshold voltage in a transfer characteristic. A thin film transistor includes an oxide semiconductor layer and a gate insulating layer disposed so as to be in contact with the oxide semiconductor layer, wherein the oxide semiconductor layer contains hydrogen atoms and includes at least two regions that function as active layers of the oxide semiconductor and have different average hydrogen concentrations in the layer thickness direction; and when the regions functioning as the active layers of the oxide semiconductor are sequentially defined as, from the side of the gate insulating layer, a first region and a second region, the average hydrogen concentration of the first region is lower than the average hydrogen concentration of the second region.
    Type: Application
    Filed: September 27, 2010
    Publication date: March 31, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ayumu Sato, Hideya Kumomi, Ryo Hayashi, Tomohiro Watanabe
  • Publication number: 20110042670
    Abstract: Provided are a coplanar structure thin film transistor that allows a threshold voltage to change only a little under electric stress, and a method of manufacturing the same. The thin film transistor includes on a substrate at least: a gate electrode; a gate insulating layer; an oxide semiconductor layer including a source electrode, a drain electrode, and a channel region; a channel protection layer; and an interlayer insulating layer. The channel protection layer includes one or more layers, the layer in contact with the oxide semiconductor layer among the one or more layers being made of an insulating material containing oxygen, ends of the channel protection layer are thinner than a central part of the channel protection layer, the interlayer insulating layer contains hydrogen, and regions of the oxide semiconductor layer that are in direct contact with the interlayer insulating layer form the source electrode and the drain electrode.
    Type: Application
    Filed: April 28, 2009
    Publication date: February 24, 2011
    Applicant: Canon Kabushiki Kaisha
    Inventors: Ayumu Sato, Ryo Hayashi, Hisato Yabuta, Masafumi Sano