Patents by Inventor Azalia Mirhoseini

Azalia Mirhoseini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250124207
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip placement. One of the methods includes training, through reinforcement learning, a node placement neural network that is configured to, at each of a plurality of time steps, receive an input representation comprising data representing a current state of a placement of a netlist of nodes on a surface of an integrated circuit chip as of the time step and process the input representation to generate a score distribution over a plurality of positions on the surface of the integrated circuit chip.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 17, 2025
    Inventors: Ebrahim Songhori, Wenjie Jiang, Sergio Guadarrama Cotado, Young-Joon Lee, Azalia Mirhoseini, Anna Darling Goldie, Roger David Carpenter, Yuting Yue, Kuang-Huei Lee, James Laudon, Toby James Boyd, Quoc V. Le
  • Patent number: 12248745
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip placement. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip placement, comprising placing a respective macro node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the macro node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Grant
    Filed: December 22, 2023
    Date of Patent: March 11, 2025
    Assignee: Google LLC
    Inventors: Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang, Roger David Carpenter, Young-Joon Lee, Mustafa Nazim Yazgan, Chian-min Richard Ho, Quoc V. Le, James Laudon, Jeffrey Adgate Dean, Kavya Srinivasa Setty, Omkar Pathak
  • Publication number: 20250053714
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Application
    Filed: August 14, 2024
    Publication date: February 13, 2025
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Patent number: 12205038
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for optimizing the execution of the operations of a neural network. One of the methods includes obtaining data representing a graph characterizing a plurality of operations of a neural network, wherein each node of the graph characterizes an operation of the neural network and each edge of the graph characterizes data dependency between the operations; processing the data representing the graph using a graph embedding neural network to generate an embedding of the graph; and processing the embedding of the graph using a policy neural network to generate a task output, wherein the task output comprises, for each of the plurality of operations of the neural network, a respective decision for a particular optimization task.
    Type: Grant
    Filed: May 22, 2023
    Date of Patent: January 21, 2025
    Assignee: Google LLC
    Inventors: Yanqi Zhou, Sudip Roy, Amirali Abdolrashidi, Daniel Lin-Kit Wong, Chao Ma, Qiumin Xu, Azalia Mirhoseini
  • Publication number: 20250021799
    Abstract: A system includes a neural network that includes a Mixture of Experts (MoE) subnetwork between a first neural network layer and a second neural network layer. The MoE subnetwork includes multiple expert neural networks. Each expert neural network is configured to process a first layer output generated by the first neural network layer to generate a respective expert output. The MoE subnetwork further includes a gating subsystem that selects, based on the first layer output, one or more of the expert neural networks and determine a respective weight for each selected expert neural network, provides the first layer output as input to each of the selected expert neural networks, combines the expert outputs generated by the selected expert neural networks in accordance with the weights for the selected expert neural networks to generate an MoE output, and provides the MoE output as input to the second neural network layer.
    Type: Application
    Filed: July 18, 2024
    Publication date: January 16, 2025
    Inventors: Noam M. Shazeer, Azalia Mirhoseini, Krzysztof Stanislaw Maziarz
  • Publication number: 20240403660
    Abstract: Systems and methods for determining a placement for computational graph across multiple hardware devices. One of the methods includes generating a policy output using a policy neural network and using the policy output to generate a final placement that satisfies one or more constraints.
    Type: Application
    Filed: October 6, 2022
    Publication date: December 5, 2024
    Inventors: Xinfeng Xie, Azalia Mirhoseini, James Laudon, Phitchaya Mangpo Phothilimthana, Sudip Roy, Prakash Janardhana Prabhu, Ulysse Beaugnon, Yanqi Zhou
  • Publication number: 20240370693
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for determining a hardware datapath for a hardware accelerator computer chip.
    Type: Application
    Filed: April 6, 2022
    Publication date: November 7, 2024
    Inventors: Dan Zhang, Safeen Huda, Azalia Mirhoseini, Anna Darling Goldie, Ebrahim Songhori
  • Patent number: 12086516
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: September 10, 2024
    Assignee: Google LLC
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Patent number: 12067476
    Abstract: A system includes a neural network that includes a Mixture of Experts (MoE) subnetwork between a first neural network layer and a second neural network layer. The MoE subnetwork includes multiple expert neural networks. Each expert neural network is configured to process a first layer output generated by the first neural network layer to generate a respective expert output. The MoE subnetwork further includes a gating subsystem that selects, based on the first layer output, one or more of the expert neural networks and determine a respective weight for each selected expert neural network, provides the first layer output as input to each of the selected expert neural networks, combines the expert outputs generated by the selected expert neural networks in accordance with the weights for the selected expert neural networks to generate an MoE output, and provides the MoE output as input to the second neural network layer.
    Type: Grant
    Filed: September 8, 2023
    Date of Patent: August 20, 2024
    Assignee: Google LLC
    Inventors: Noam M. Shazeer, Azalia Mirhoseini, Krzysztof Stanislaw Maziarz
  • Publication number: 20240249058
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip placement. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip placement, comprising placing a respective macro node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the macro node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Application
    Filed: December 22, 2023
    Publication date: July 25, 2024
    Inventors: Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang, Roger David Carpenter, Young-Joon Lee, Mustafa Nazim Yazgan, Chian-min Richard Ho, Quoc V. Le, James Laudon, Jeffrey Adgate Dean, Kavya Srinivasa Setty, Omkar Pathak
  • Publication number: 20240220768
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for determining a hardware datapath for a hardware accelerator computer chip.
    Type: Application
    Filed: April 6, 2022
    Publication date: July 4, 2024
    Inventors: Dan Zhang, Safeen Huda, Azalia Mirhoseini, Anna Darling Goldie, Ebrahim Songhori
  • Publication number: 20240095424
    Abstract: Aspects of the disclosure are directed to automatically determining floor planning in chips, which factors in memory macro alignment. A deep reinforcement learning (RL) agent can be trained to determine optimal placements for the memory macros, where memory macro alignment can be included as a regularization cost to be added to the placement objective as a RL reward. Tradeoffs between the placement objective and alignment of macros can be controlled by a tunable alignment parameter.
    Type: Application
    Filed: August 18, 2022
    Publication date: March 21, 2024
    Inventors: Ebrahim Mohammadgholi Songhori, Shen Wang, Azalia Mirhoseini, Anna Goldie, Roger Carpenter, Wenjie Jiang, Young-Joon Lee, James Laudon
  • Patent number: 11922313
    Abstract: A system may include a processor and a memory. The memory may include program code that provides operations when executed by the processor. The operations may include: partitioning, based at least on a resource constraint of a platform, a global machine learning model into a plurality of local machine learning models; transforming training data to at least conform to the resource constraint of the platform; and training the global machine learning model by at least processing, at the platform, the transformed training data with a first of the plurality of local machine learning models.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: March 5, 2024
    Assignee: WILLIAM MARSH RICE UNIVERSITY
    Inventors: Bita Darvish Rouhani, Azalia Mirhoseini, Farinaz Koushanfar
  • Publication number: 20240062062
    Abstract: A method for determining a placement for machine learning model operations across multiple hardware devices is described.
    Type: Application
    Filed: October 3, 2023
    Publication date: February 22, 2024
    Inventors: Samuel Bengio, Mohammad Norouzi, Benoit Steiner, Jeffrey Adgate Dean, Hieu Hy Pham, Azalia Mirhoseini, Quoc V. Le, Naveen Kumar, Yuefeng Zhou, Rasmus Munk Larsen
  • Publication number: 20230419079
    Abstract: A system includes a neural network that includes a Mixture of Experts (MoE) subnetwork between a first neural network layer and a second neural network layer. The MoE subnetwork includes multiple expert neural networks. Each expert neural network is configured to process a first layer output generated by the first neural network layer to generate a respective expert output. The MoE subnetwork further includes a gating subsystem that selects, based on the first layer output, one or more of the expert neural networks and determine a respective weight for each selected expert neural network, provides the first layer output as input to each of the selected expert neural networks, combines the expert outputs generated by the selected expert neural networks in accordance with the weights for the selected expert neural networks to generate an MoE output, and provides the MoE output as input to the second neural network layer.
    Type: Application
    Filed: September 8, 2023
    Publication date: December 28, 2023
    Inventors: Noam M. Shazeer, Azalia Mirhoseini, Krzysztof Stanislaw Maziarz
  • Patent number: 11853677
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip placement. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip placement, comprising placing a respective macro node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the macro node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: December 26, 2023
    Assignee: Google LLC
    Inventors: Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang, Roger David Carpenter, Young-Joon Lee, Mustafa Nazim Yazgan, Chian-min Richard Ho, Quoc V. Le, James Laudon, Jeffrey Adgate Dean, Kavya Srinivasa Setty, Omkar Pathak
  • Publication number: 20230394203
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Application
    Filed: May 1, 2023
    Publication date: December 7, 2023
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Patent number: 11803747
    Abstract: A method for determining a placement for machine learning model operations across multiple hardware devices is described.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: October 31, 2023
    Assignee: Google LLC
    Inventors: Samuel Bengio, Mohammad Norouzi, Benoit Steiner, Jeffrey Adgate Dean, Hieu Hy Pham, Azalia Mirhoseini, Quoc V. Le, Naveen Kumar, Yuefeng Zhou, Rasmus Munk Larsen
  • Patent number: 11790214
    Abstract: A system includes a neural network that includes a Mixture of Experts (MoE) subnetwork between a first neural network layer and a second neural network layer. The MoE subnetwork includes multiple expert neural networks. Each expert neural network is configured to process a first layer output generated by the first neural network layer to generate a respective expert output. The MoE subnetwork further includes a gating subsystem that selects, based on the first layer output, one or more of the expert neural networks and determine a respective weight for each selected expert neural network, provides the first layer output as input to each of the selected expert neural networks, combines the expert outputs generated by the selected expert neural networks in accordance with the weights for the selected expert neural networks to generate an MoE output, and provides the MoE output as input to the second neural network layer.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: October 17, 2023
    Assignee: Google LLC
    Inventors: Noam M. Shazeer, Azalia Mirhoseini, Krzysztof Stanislaw Maziarz
  • Publication number: 20230306266
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for optimizing the execution of the operations of a neural network. One of the methods includes obtaining data representing a graph characterizing a plurality of operations of a neural network, wherein each node of the graph characterizes an operation of the neural network and each edge of the graph characterizes data dependency between the operations; processing the data representing the graph using a graph embedding neural network to generate an embedding of the graph; and processing the embedding of the graph using a policy neural network to generate a task output, wherein the task output comprises, for each of the plurality of operations of the neural network, a respective decision for a particular optimization task.
    Type: Application
    Filed: May 22, 2023
    Publication date: September 28, 2023
    Inventors: Yanqi Zhou, Sudip Roy, Amirali Abdolrashidi, Daniel Lin-Kit Wong, Chao Ma, Qiumin Xu, Azalia Mirhoseini