Patents by Inventor Azghar H Khazi-Syed

Azghar H Khazi-Syed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230420258
    Abstract: A microelectronic device with a trench structure is formed by forming a trench in a substrate, forming a seed layer in the trench, the seed layer including an amorphous dielectric material; and forming semi-amorphous polysilicon on the amorphous dielectric material. The semi-amorphous polysilicon has amorphous silicon regions separated by polycrystalline silicon. Subsequent thermal processes used in fabrication of the microelectronic device may convert the semi-amorphous polysilicon in the trench to a polysilicon core. In one aspect, the seed layer may be formed on sidewalls of the trench, contacting the substrate. In another aspect, a polysilicon outer layer may be formed in the trench before forming the seed layer, and the seed layer may be formed on the polysilicon layer.
    Type: Application
    Filed: July 5, 2023
    Publication date: December 28, 2023
    Inventors: Damien Thomas Gilmore, Jonathan P. Davis, Azghar H Khazi-Syed, Shariq Arshad, Khanh Quang Le, Kaneez Eshaher Banu, Jonathan Roy Garrett, Sarah Elizabeth Bradshaw, Eugene Clayton Davis
  • Patent number: 11742208
    Abstract: A microelectronic device with a trench structure is formed by forming a trench in a substrate, forming a seed layer in the trench, the seed layer including an amorphous dielectric material; and forming semi-amorphous polysilicon on the amorphous dielectric material. The semi-amorphous polysilicon has amorphous silicon regions separated by polycrystalline silicon. Subsequent thermal processes used in fabrication of the microelectronic device may convert the semi-amorphous polysilicon in the trench to a polysilicon core. In one aspect, the seed layer may be formed on sidewalls of the trench, contacting the substrate. In another aspect, a polysilicon outer layer may be formed in the trench before forming the seed layer, and the seed layer may be formed on the polysilicon layer.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: August 29, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Damien Thomas Gilmore, Jonathan P. Davis, Azghar H Khazi-Syed, Shariq Arshad, Khanh Quang Le, Kaneez Eshaher Banu, Jonathan Roy Garrett, Sarah Elizabeth Bradshaw, Eugene Clayton Davis
  • Publication number: 20210305050
    Abstract: A microelectronic device with a trench structure is formed by forming a trench in a substrate, forming a seed layer in the trench, the seed layer including an amorphous dielectric material; and forming semi-amorphous polysilicon on the amorphous dielectric material. The semi-amorphous polysilicon has amorphous silicon regions separated by polycrystalline silicon. Subsequent thermal processes used in fabrication of the microelectronic device may convert the semi-amorphous polysilicon in the trench to a polysilicon core. In one aspect, the seed layer may be formed on sidewalls of the trench, contacting the substrate. In another aspect, a polysilicon outer layer may be formed in the trench before forming the seed layer, and the seed layer may be formed on the polysilicon layer.
    Type: Application
    Filed: March 25, 2020
    Publication date: September 30, 2021
    Applicant: Texas Instruments Incorporated
    Inventors: Damien Thomas Gilmore, Jonathan P. Davis, Azghar H Khazi-Syed, Shariq Arshad, Khanh Quang Le, Kaneez Eshaher Banu, Jonathan Roy Garrett, Sarah Elizabeth Bradshaw, Eugene Clayton Davis
  • Publication number: 20190189751
    Abstract: A microelectronic device includes a substrate comprising a semiconductor material having a top surface. An epitaxial layer is located on the top surface of the substrate. A doped buried layer is located within the semiconductor material, and the top surface has a surface recess over the buried layer. The surface recess has a maximum step height no greater than about 5 nanometers. A method of forming the microelectronic device is also disclosed.
    Type: Application
    Filed: February 22, 2019
    Publication date: June 20, 2019
    Inventors: Binghua Hu, Azghar H. Khazi-Syed, Shariq Arshad
  • Patent number: 10243048
    Abstract: A microelectronic device having an n-type buried layer (NBL) is formed by forming a thin screen layer on the top surface of the substrate. Antimony is implanted through the screen layer exposed by an implant mask into the substrate; the implant mask blocks antimony from the substrate outside the NBL area. The implant mask is removed, leaving the screen layer, which has the same thickness over the NBL area and the area outside the NBL, on the surface. Silicon dioxide is formed during an anneal/drive process, both in the NBL area and outside the NBL area. Slightly more silicon dioxide is formed in the NBL area, consuming more silicon there and so forming a shallow silicon recess. An epitaxial layer is grown on the top surface of the substrate. A structure for the microelectronic device is also disclosed.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: March 26, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Binghua Hu, Azghar H Khazi-Syed, Shariq Arshad
  • Publication number: 20180315818
    Abstract: A microelectronic device having an n-type buried layer (NBL) is formed by forming a thin screen layer on the top surface of the substrate. Antimony is implanted through the screen layer exposed by an implant mask into the substrate; the implant mask blocks antimony from the substrate outside the NBL area. The implant mask is removed, leaving the screen layer, which has the same thickness over the NBL area and the area outside the NBL, on the surface. Silicon dioxide is formed during an anneal/drive process, both in the NBL area and outside the NBL area. Slightly more silicon dioxide is formed in the NBL area, consuming more silicon there and so forming a shallow silicon recess. An epitaxial layer is grown on the top surface of the substrate. A structure for the microelectronic device is also disclosed.
    Type: Application
    Filed: April 27, 2017
    Publication date: November 1, 2018
    Applicant: Texas Instruments Incorporated
    Inventors: Binghua Hu, Azghar H Khazi-Syed, Shariq Arshad