Patents by Inventor B. Bhat
B. Bhat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11677041Abstract: Radiation detecting-structures and fabrications methods thereof are presented. The methods include, for instance: providing a substrate, the substrate including at least one trench extending into the substrate from an upper surface thereof; and epitaxially forming a radiation-responsive semiconductor material layer from one or more sidewalls of the at least one trench of the substrate, the radiation-responsive semiconductor material layer responding to incident radiation by generating charge carriers therein. In one embodiment, the sidewalls of the at least one trench of the substrate include a (111) surface of the substrate, which facilitates epitaxially forming the radiation-responsive semiconductor material layer. In another embodiment, the radiation-responsive semiconductor material layer includes hexagonal boron nitride, and the epitaxially forming includes providing the hexagonal boron nitride with an a-axis aligned parallel to the sidewalls of the trench.Type: GrantFiled: June 22, 2015Date of Patent: June 13, 2023Assignee: Rensselaer Polytechnic InstituteInventors: Rajendra P. Dahal, Ishwara B. Bhat, Yaron Danon, James Jian-Qiang Lu
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Patent number: 9971512Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: GrantFiled: September 11, 2017Date of Patent: May 15, 2018Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Patent number: 9922838Abstract: Methods for facilitating fabricating semiconductor structures are provided which include: providing a multilayer structure including a semiconductor layer, the semiconductor layer including a dopant and having an increased conductivity; selectively increasing, using electrochemical processing, porosity of the semiconductor layer, at least in part, the selectively increasing porosity utilizing the increased conductivity of the semiconductor layer; and removing, at least in part, the semiconductor layer with the selectively increased porosity from the multilayer structure. By way of example, the selectively increasing porosity may include selectively, anodically oxidizing, at least in part, the semiconductor layer of the multilayer structure.Type: GrantFiled: February 10, 2015Date of Patent: March 20, 2018Assignee: RENSSELAER POLYTECHNIC INSTITUTEInventors: Rajendra P. Dahal, Ishwara B. Bhat, Tat-Sing Chow
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Patent number: 9891836Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: GrantFiled: July 19, 2017Date of Patent: February 13, 2018Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Patent number: 9886198Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: GrantFiled: March 27, 2017Date of Patent: February 6, 2018Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Publication number: 20170364278Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: ApplicationFiled: September 11, 2017Publication date: December 21, 2017Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Patent number: 9810794Abstract: Methods for fabricating radiation-detecting structures are presented. The methods include, for instance: fabricating a radiation-detecting structure, the fabricating including: providing a semiconductor substrate, the semiconductor substrate having a plurality of cavities extending into the semiconductor substrate from a surface thereof; and electrophoretically depositing radiation-detecting particles of a radiation-detecting material into the plurality of cavities extending into the semiconductor substrate, where the electrophoretically depositing fills the plurality of cavities with the radiation-detecting particles. In one embodiment, the providing can include electrochemically etching the semiconductor substrate to form the plurality of cavities extending into the semiconductor substrate.Type: GrantFiled: June 22, 2015Date of Patent: November 7, 2017Assignee: RENSSELAER POLYTECHNIC INSTITUTEInventors: Rajendra P. Dahal, Ishwara B. Bhat, Yaron Danon, James Jian-Qiang Lu
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Publication number: 20170315732Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: ApplicationFiled: July 19, 2017Publication date: November 2, 2017Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Publication number: 20170199677Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: ApplicationFiled: March 27, 2017Publication date: July 13, 2017Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Patent number: 9696933Abstract: A rule-based method for pre-fetching “important pages” from memory paging space back into kernel memory space performs the following steps: (i) establishing a first machine logic based rule, with the machine logic based rule including a first triggering condition and a first consequential responsive action; (ii) determining that the first triggering condition has occurred; and (iii) in response to the determination that the first triggering condition has occurred, performing the first consequential responsive action. The first triggering condition includes the following sub-conditions: (i) at least one of a first set of important page(s) of a computer system has been paged out of kernel memory space and into paging memory space, and (ii) a processing status of the computer system indicates that the first set of important page(s) will be likely to be required for computer operations.Type: GrantFiled: August 15, 2014Date of Patent: July 4, 2017Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Keerthi B. Kumar, Deepak L. Ranganath
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Publication number: 20170170025Abstract: Methods for facilitating fabricating semiconductor structures are provided which include: providing a multilayer structure including a semiconductor layer, the semiconductor layer including a dopant and having an increased conductivity; selectively increasing, using electrochemical processing, porosity of the semiconductor layer, at least in part, the selectively increasing porosity utilizing the increased conductivity of the semiconductor layer; and removing, at least in part, the semiconductor layer with the selectively increased porosity from the multilayer structure. By way of example, the selectively increasing porosity may include selectively, anodically oxidizing, at least in part, the semiconductor layer of the multilayer structure.Type: ApplicationFiled: February 10, 2015Publication date: June 15, 2017Applicant: RENSSELAER POLYTECHNIC INSTITUTEInventors: Rajendra P. DAHAL, Ishwara B. BHAT, Tat-Sing CHOW
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Patent number: 9678888Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: GrantFiled: September 19, 2016Date of Patent: June 13, 2017Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Publication number: 20170139060Abstract: Methods for fabricating radiation-detecting structures are presented. The methods include, for instance: fabricating a radiation-detecting structure, the fabricating including: providing a semiconductor substrate, the semiconductor substrate having a plurality of cavities extending into the semiconductor substrate from a surface thereof; and electrophoretically depositing radiation-detecting particles of a radiation-detecting material into the plurality of cavities extending into the semiconductor substrate, where the electrophoretically depositing fills the plurality of cavities with the radiation-detecting particles. In one embodiment, the providing can include electrochemically etching the semiconductor substrate to form the plurality of cavities extending into the semiconductor substrate.Type: ApplicationFiled: June 22, 2015Publication date: May 18, 2017Applicant: RENSSELAER POLYTECHNIC INSTITUTEInventors: Rajendra P. DAHAL, Ishwara B. BHAT, Yaron DANON, James Jian-Qiang LU
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Publication number: 20170133543Abstract: Radiation detecting-structures and fabrications methods thereof are presented. The methods include, for instance: providing a substrate, the substrate including at least one trench extending into the substrate from an upper surface thereof; and epitaxially forming a radiation-responsive semiconductor material layer from one or more sidewalls of the at least one trench of the substrate, the radiation-responsive semiconductor material layer responding to incident radiation by generating charge carriers therein. In one embodiment, the sidewalls of the at least one trench of the substrate include a (111) surface of the substrate, which facilitates epitaxially forming the radiation-responsive semiconductor material layer. In another embodiment, the radiation-responsive semiconductor material layer includes hexagonal boron nitride, and the epitaxially forming includes providing the hexagonal boron nitride with an a-axis aligned parallel to the sidewalls of the trench.Type: ApplicationFiled: June 22, 2015Publication date: May 11, 2017Applicant: RENSSELAER POLYTECHNIC INSTITUTEInventors: Rajendra P. DAHAL, Ishwara B. BHAT, Yaron DANON, James Jian-Qiang LU
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Patent number: 9645262Abstract: In one embodiment, an apparatus includes: a first layer including a n+ dopant or p+ dopant; an intrinsic layer formed above the first layer, the intrinsic layer including a planar portion and pillars extending above the planar portion, cavity regions being defined between the pillars; and a second layer deposited on a periphery of the pillars thereby forming coated pillars, the second layer being substantially absent on the planar portion of the intrinsic layer between the coated pillars. The second layer includes an n+ dopant when the first layer includes a p+ dopant. The second layer includes a p+ dopant when the first layer includes an n+ dopant. The apparatus includes a neutron sensitive material deposited between the coated pillars and above the planar portion of the intrinsic layer. In additional embodiments, an upper portion of each of the pillars includes a same type of dopant as the second layer.Type: GrantFiled: November 26, 2014Date of Patent: May 9, 2017Assignees: Lawrence Livermore National Security, LLCInventors: Qinghui Shao, Adam Conway, Rebecca J. Nikolic, Lars Voss, Ishwara B. Bhat, Sara E. Harrison
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Patent number: 9569252Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: GrantFiled: July 14, 2016Date of Patent: February 14, 2017Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Publication number: 20160378681Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: ApplicationFiled: September 19, 2016Publication date: December 29, 2016Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Publication number: 20160356901Abstract: In one embodiment, an apparatus includes: a first layer including a n+ dopant or p+ dopant; an intrinsic layer formed above the first layer, the intrinsic layer including a planar portion and pillars extending above the planar portion, cavity regions being defined between the pillars; and a second layer deposited on a periphery of the pillars thereby forming coated pillars, the second layer being substantially absent on the planar portion of the intrinsic layer between the coated pillars. The second layer includes an n+ dopant when the first layer includes a p+ dopant. The second layer includes a p+ dopant when the first layer includes an n+ dopant. The apparatus includes a neutron sensitive material deposited between the coated pillars and above the planar portion of the intrinsic layer. In additional embodiments, an upper portion of each of the pillars includes a same type of dopant as the second layer.Type: ApplicationFiled: November 26, 2014Publication date: December 8, 2016Inventors: Qinghui Shao, Adam Conway, Rebecca J. Nikolic, Lars Voss, Ishwara B. Bhat, Sara E. Harrison
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Publication number: 20160321193Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: ApplicationFiled: July 14, 2016Publication date: November 3, 2016Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Patent number: 9471230Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: GrantFiled: May 16, 2016Date of Patent: October 18, 2016Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda