Patents by Inventor B. Bhat

B. Bhat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11677041
    Abstract: Radiation detecting-structures and fabrications methods thereof are presented. The methods include, for instance: providing a substrate, the substrate including at least one trench extending into the substrate from an upper surface thereof; and epitaxially forming a radiation-responsive semiconductor material layer from one or more sidewalls of the at least one trench of the substrate, the radiation-responsive semiconductor material layer responding to incident radiation by generating charge carriers therein. In one embodiment, the sidewalls of the at least one trench of the substrate include a (111) surface of the substrate, which facilitates epitaxially forming the radiation-responsive semiconductor material layer. In another embodiment, the radiation-responsive semiconductor material layer includes hexagonal boron nitride, and the epitaxially forming includes providing the hexagonal boron nitride with an a-axis aligned parallel to the sidewalls of the trench.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: June 13, 2023
    Assignee: Rensselaer Polytechnic Institute
    Inventors: Rajendra P. Dahal, Ishwara B. Bhat, Yaron Danon, James Jian-Qiang Lu
  • Patent number: 9971512
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: May 15, 2018
    Assignee: International Business Machines Corporation
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Patent number: 9922838
    Abstract: Methods for facilitating fabricating semiconductor structures are provided which include: providing a multilayer structure including a semiconductor layer, the semiconductor layer including a dopant and having an increased conductivity; selectively increasing, using electrochemical processing, porosity of the semiconductor layer, at least in part, the selectively increasing porosity utilizing the increased conductivity of the semiconductor layer; and removing, at least in part, the semiconductor layer with the selectively increased porosity from the multilayer structure. By way of example, the selectively increasing porosity may include selectively, anodically oxidizing, at least in part, the semiconductor layer of the multilayer structure.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: March 20, 2018
    Assignee: RENSSELAER POLYTECHNIC INSTITUTE
    Inventors: Rajendra P. Dahal, Ishwara B. Bhat, Tat-Sing Chow
  • Patent number: 9891836
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Patent number: 9886198
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: February 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Publication number: 20170364278
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Application
    Filed: September 11, 2017
    Publication date: December 21, 2017
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Patent number: 9810794
    Abstract: Methods for fabricating radiation-detecting structures are presented. The methods include, for instance: fabricating a radiation-detecting structure, the fabricating including: providing a semiconductor substrate, the semiconductor substrate having a plurality of cavities extending into the semiconductor substrate from a surface thereof; and electrophoretically depositing radiation-detecting particles of a radiation-detecting material into the plurality of cavities extending into the semiconductor substrate, where the electrophoretically depositing fills the plurality of cavities with the radiation-detecting particles. In one embodiment, the providing can include electrochemically etching the semiconductor substrate to form the plurality of cavities extending into the semiconductor substrate.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: November 7, 2017
    Assignee: RENSSELAER POLYTECHNIC INSTITUTE
    Inventors: Rajendra P. Dahal, Ishwara B. Bhat, Yaron Danon, James Jian-Qiang Lu
  • Publication number: 20170315732
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Application
    Filed: July 19, 2017
    Publication date: November 2, 2017
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Publication number: 20170199677
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Application
    Filed: March 27, 2017
    Publication date: July 13, 2017
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Patent number: 9696933
    Abstract: A rule-based method for pre-fetching “important pages” from memory paging space back into kernel memory space performs the following steps: (i) establishing a first machine logic based rule, with the machine logic based rule including a first triggering condition and a first consequential responsive action; (ii) determining that the first triggering condition has occurred; and (iii) in response to the determination that the first triggering condition has occurred, performing the first consequential responsive action. The first triggering condition includes the following sub-conditions: (i) at least one of a first set of important page(s) of a computer system has been paged out of kernel memory space and into paging memory space, and (ii) a processing status of the computer system indicates that the first set of important page(s) will be likely to be required for computer operations.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: July 4, 2017
    Assignee: International Business Machines Corporation
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Keerthi B. Kumar, Deepak L. Ranganath
  • Publication number: 20170170025
    Abstract: Methods for facilitating fabricating semiconductor structures are provided which include: providing a multilayer structure including a semiconductor layer, the semiconductor layer including a dopant and having an increased conductivity; selectively increasing, using electrochemical processing, porosity of the semiconductor layer, at least in part, the selectively increasing porosity utilizing the increased conductivity of the semiconductor layer; and removing, at least in part, the semiconductor layer with the selectively increased porosity from the multilayer structure. By way of example, the selectively increasing porosity may include selectively, anodically oxidizing, at least in part, the semiconductor layer of the multilayer structure.
    Type: Application
    Filed: February 10, 2015
    Publication date: June 15, 2017
    Applicant: RENSSELAER POLYTECHNIC INSTITUTE
    Inventors: Rajendra P. DAHAL, Ishwara B. BHAT, Tat-Sing CHOW
  • Patent number: 9678888
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: June 13, 2017
    Assignee: International Business Machines Corporation
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Publication number: 20170139060
    Abstract: Methods for fabricating radiation-detecting structures are presented. The methods include, for instance: fabricating a radiation-detecting structure, the fabricating including: providing a semiconductor substrate, the semiconductor substrate having a plurality of cavities extending into the semiconductor substrate from a surface thereof; and electrophoretically depositing radiation-detecting particles of a radiation-detecting material into the plurality of cavities extending into the semiconductor substrate, where the electrophoretically depositing fills the plurality of cavities with the radiation-detecting particles. In one embodiment, the providing can include electrochemically etching the semiconductor substrate to form the plurality of cavities extending into the semiconductor substrate.
    Type: Application
    Filed: June 22, 2015
    Publication date: May 18, 2017
    Applicant: RENSSELAER POLYTECHNIC INSTITUTE
    Inventors: Rajendra P. DAHAL, Ishwara B. BHAT, Yaron DANON, James Jian-Qiang LU
  • Publication number: 20170133543
    Abstract: Radiation detecting-structures and fabrications methods thereof are presented. The methods include, for instance: providing a substrate, the substrate including at least one trench extending into the substrate from an upper surface thereof; and epitaxially forming a radiation-responsive semiconductor material layer from one or more sidewalls of the at least one trench of the substrate, the radiation-responsive semiconductor material layer responding to incident radiation by generating charge carriers therein. In one embodiment, the sidewalls of the at least one trench of the substrate include a (111) surface of the substrate, which facilitates epitaxially forming the radiation-responsive semiconductor material layer. In another embodiment, the radiation-responsive semiconductor material layer includes hexagonal boron nitride, and the epitaxially forming includes providing the hexagonal boron nitride with an a-axis aligned parallel to the sidewalls of the trench.
    Type: Application
    Filed: June 22, 2015
    Publication date: May 11, 2017
    Applicant: RENSSELAER POLYTECHNIC INSTITUTE
    Inventors: Rajendra P. DAHAL, Ishwara B. BHAT, Yaron DANON, James Jian-Qiang LU
  • Patent number: 9645262
    Abstract: In one embodiment, an apparatus includes: a first layer including a n+ dopant or p+ dopant; an intrinsic layer formed above the first layer, the intrinsic layer including a planar portion and pillars extending above the planar portion, cavity regions being defined between the pillars; and a second layer deposited on a periphery of the pillars thereby forming coated pillars, the second layer being substantially absent on the planar portion of the intrinsic layer between the coated pillars. The second layer includes an n+ dopant when the first layer includes a p+ dopant. The second layer includes a p+ dopant when the first layer includes an n+ dopant. The apparatus includes a neutron sensitive material deposited between the coated pillars and above the planar portion of the intrinsic layer. In additional embodiments, an upper portion of each of the pillars includes a same type of dopant as the second layer.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: May 9, 2017
    Assignees: Lawrence Livermore National Security, LLC
    Inventors: Qinghui Shao, Adam Conway, Rebecca J. Nikolic, Lars Voss, Ishwara B. Bhat, Sara E. Harrison
  • Patent number: 9569252
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: February 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Publication number: 20160378681
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Application
    Filed: September 19, 2016
    Publication date: December 29, 2016
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Publication number: 20160356901
    Abstract: In one embodiment, an apparatus includes: a first layer including a n+ dopant or p+ dopant; an intrinsic layer formed above the first layer, the intrinsic layer including a planar portion and pillars extending above the planar portion, cavity regions being defined between the pillars; and a second layer deposited on a periphery of the pillars thereby forming coated pillars, the second layer being substantially absent on the planar portion of the intrinsic layer between the coated pillars. The second layer includes an n+ dopant when the first layer includes a p+ dopant. The second layer includes a p+ dopant when the first layer includes an n+ dopant. The apparatus includes a neutron sensitive material deposited between the coated pillars and above the planar portion of the intrinsic layer. In additional embodiments, an upper portion of each of the pillars includes a same type of dopant as the second layer.
    Type: Application
    Filed: November 26, 2014
    Publication date: December 8, 2016
    Inventors: Qinghui Shao, Adam Conway, Rebecca J. Nikolic, Lars Voss, Ishwara B. Bhat, Sara E. Harrison
  • Publication number: 20160321193
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Application
    Filed: July 14, 2016
    Publication date: November 3, 2016
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
  • Patent number: 9471230
    Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: October 18, 2016
    Assignee: International Business Machines Corporation
    Inventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda