Abstract: Disclosed herein are techniques of manufacturing semiconductor devices having a positive-bevel termination and/or a negative-bevel termination. In a particular example, techniques are disclosed for manufacture of a chip-size SiC device having an orthogonal positive-bevel termination used for the reverse blocking junction. The edge termination may be formed, for example, by cutting across a SiC wafer with a V-shaped dicing tool or blade. The cut may be performed by any suitable dicing tool. The cut may be across a p-n junction for forming positive-bevel termination. Subsequently, a surface of the termination may be etched for removing damage caused by the cutting process.

Abstract: A gate-controlled bipolar transistor with buried collector includes a wide base bipolar transistor in a semiconductor substrate having a trench at a face thereof. A dual-channel insulated-gate field effect transistor (IGFET) is also included adjacent a sidewall of the trench for providing gated turn-on and turn-off control of the bipolar transistor. The bipolar transistor includes a buried collector region at a bottom of the trench, which is electrically connected to a cathode contact at the face. An emitter of the transistor is electrically connected to an anode contact at an opposing face of the substrate. For turn-on, the base of the bipolar transistor is electrically connected to the cathode contact upon the application of a gate bias signal to the IGFET. By electrically connecting the base to the cathode contact, forward conduction can be established once the anode contact is appropriately biased relative to the cathode contact.

Abstract: A semiconductor switching device includes a plurality of adjacent and parallel-connected switching cells in a semiconductor substrate. Each cell includes a thyristor having a floating emitter region and a trench-gate field effect transistor (TFET) for providing turn-on and turn-off control of the thyristor. In one embodiment of the switching device, parasitic thyristor latch-up is suppressed by using a dual-channel TFET which forms both inversion-layer and accumulation-layer channel connections in series between respective floating emitter regions and the cathode contact. In another embodiment, parasitic thyristor latch-up is prevented by joining floating emitter regions of a pair of adjacent cells to thereby eliminate a parasitic P-N-P-N path between the anode and cathode contacts.

Abstract: A trench gate lateral MOSFET structure has the voltage supported along side walls and the bottom surface of the trench. With narrow source and drain mesa regions that are optimally doped, a uniform electric field is obtained vertically in the mesa regions and horizontally at the bottom of the trench, allowing a relative high doping level in an N-drift region resulting in specific on-resistances well below those of conventional lateral MOSFETs at a high breakdown voltage.

Abstract: A switching device including four layers (20), (22), (42) and (44) and a gate electrode (32). In its blocking state the switching device operates as a conventional thyristor. The device is turned off by reducing the effective resistance of the upper base region (42) by applying a negative voltage to the gate (32).

Abstract: A field controlled thyristor having its base doped more lightly near the gate than near the anode achieves a low forward voltage drop, high blocking gain, and fast switching speed at any given forward blocking voltage rating. Although the high resistivity region around the gate area allows the device to pinch off anode current flow at zero gate bias due to the gate junction inherent potential, a small forward gate voltage can trigger the device into conduction. The high resistivity of the channel area between gates provides DC blocking gains greater than 60. The device can be fabricated using conventional planar processing techniques.

Abstract: A field-controlled bipolar transistor characterized by a bidirectional voltage blocking capability between the collector and emitter electrodes is described as comprising a semiconductor substrate with base, emitter and collector regions formed in the semiconductor substrate with the base region of one conductivity type and the emitter and collector regions of opposite conductivity type. A gate region, also of opposite conductivity type, is formed in the substrate and positioned with respect to the emitter and collector regions so that when the junction formed between the gate region and the substrate is reverse-biased, a depletion region forms which pinches off current flow between the emitter and collector regions thereby providing a transistor that is capable of blocking high voltages in both forward and reverse directions while having normal bipolar transistor characteristics in the forward direction.

Abstract: A thyristor is protected against voltage breakover turn-on failure by selective control of the minority charge carrier lifetime in the base region and in the gate region to establish a predictable location of the voltage breakover turn-on in the gate region. Carrier lifetime modification in the selected gate region is achieved by shielding the gate region during electron irradiation of the high-lifetime silicon substrate to protect against lifetime-killing radiation defect centers, by annealling the gate region after electron irradiation to a temperature threshold known to eliminate the radiation-induced defects, or by introducing lifetime killing defects, such as gold or platinum, external to the gate region, typically by selective diffusion or localized ion implantation.

Abstract: An electric field-controlled thyristor having improved voltage blocking characteristics comprises a semiconductor substrate with a cathode region in one major surface and interdigitated anode and gate regions in the other major surface. The thyristor includes a single high voltage junction which is capable of blocking voltages of either positive or negative polarity by the application of a control voltage, which is a fraction of the blocking voltage, between the anode and gate regions.

Abstract: Geometrical design criteria are disclosed for a Gate Modulated BiPolar Transistor, or GAMBIT, which is a three terminal variable negative resistance device. The GAMBIT is a planar, interdigited, integrated device whose electrical characteristics show a voltage controlled negative resistance between two of its terminals. The magnitude of the negative resistance is controlled by the variation of the applied bias to the third terminal.