Patents by Inventor BABA L. ARIMILLI

BABA L. ARIMILLI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interconnection network topology for large scale high performance computing (HPC) systems
    Patent number: 9626322
    Abstract: A multiprocessor computer system includes a plurality of processor nodes and at least a three-tier hierarchical network interconnecting the processor nodes. The hierarchical network includes a plurality of routers interconnected such that each router is connected to a subset of the plurality of processor nodes; the plurality of routers are arranged in a hierarchy of n?3 tiers (T1, . . . , Tn); the plurality of routers are partitioned into disjoint groups at the first tier T1, the groups at tier Ti being partitioned into disjoint groups (of complete Ti groups) at the next tier Ti+1 and a top tier Tn including a single group containing all of the plurality of routers; and for all tiers 1?i?n, each tier-Ti?1 subgroup within a tier Ti group is connected by at least one link to all other tier-Ti?1 subgroups within the same tier Ti group.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: April 18, 2017
    Assignee: International Business Machines Corporation
    Inventors: Baba L. Arimilli, Wolfgang Denzel, Philip Heidelberger, German Rodriguez Herrera, Christopher J. Johnson, Lonny Lambrecht, Cyriel Minkenberg, Bogdan Prisacari
  • Interconnection network topology for large scale high performance computing (HPC) systems
    Patent number: 9519605
    Abstract: A multiprocessor computer system includes a plurality of processor nodes and at least a three-tier hierarchical network interconnecting the processor nodes. The hierarchical network includes a plurality of routers interconnected such that each router is connected to a subset of the plurality of processor nodes; the plurality of routers are arranged in a hierarchy of n?3 tiers (T1, . . . , Tn); the plurality of routers are partitioned into disjoint groups at the first tier T1, the groups at tier Ti being partitioned into disjoint groups (of complete Ti groups) at the next tier Ti+1 and a top tier Tn including a single group containing all of the plurality of routers; and for all tiers 1?i?n, each tier-Ti?1 subgroup within a tier Ti group is connected by at least one link to all other tier-Ti?1 subgroups within the same tier Ti group.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: December 13, 2016
    Assignee: International Business Machines Corporation
    Inventors: Baba L. Arimilli, Wolfgang Denzel, Philip Heidelberger, German Rodriguez Herrera, Christopher J. Johnson, Lonny Lambrecht, Cyriel Minkenberg, Bogdan Prisacari
  • INTERCONNECTION NETWORK TOPOLOGY FOR LARGE SCALE HIGH PERFORMANCE COMPUTING (HPC) SYSTEMS
    Publication number: 20160012004
    Abstract: A multiprocessor computer system includes a plurality of processor nodes and at least a three-tier hierarchical network interconnecting the processor nodes. The hierarchical network includes a plurality of routers interconnected such that each router is connected to a subset of the plurality of processor nodes; the plurality of routers are arranged in a hierarchy of n?3 tiers (T1, . . . , Tn); the plurality of routers are partitioned into disjoint groups at the first tier T1, the groups at tier Ti being partitioned into disjoint groups (of complete Ti groups) at the next tier Ti+1 and a top tier Tn including a single group containing all of the plurality of routers; and for all tiers 1?i?n, each tier-Ti?1 subgroup within a tier Ti group is connected by at least one link to all other tier-Ti?1 subgroups within the same tier Ti group.
    Type: Application
    Filed: July 8, 2014
    Publication date: January 14, 2016
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: BABA L. ARIMILLI, WOLFGANG DENZEL, PHILIP HEIDELBERGER, GERMAN RODRIGUEZ HERRERA, CHRISTOPHER J. JOHNSON, LONNY LAMBRECHT, CYRIEL MINKENBERG, BOGDAN PRISACARI
  • INTERCONNECTION NETWORK TOPOLOGY FOR LARGE SCALE HIGH PERFORMANCE COMPUTING (HPC) SYSTEMS
    Publication number: 20160012002
    Abstract: A multiprocessor computer system includes a plurality of processor nodes and at least a three-tier hierarchical network interconnecting the processor nodes. The hierarchical network includes a plurality of routers interconnected such that each router is connected to a subset of the plurality of processor nodes; the plurality of routers are arranged in a hierarchy of n?3 tiers (T1, . . . , Tn); the plurality of routers are partitioned into disjoint groups at the first tier T1, the groups at tier Ti being partitioned into disjoint groups (of complete Ti groups) at the next tier Ti+1 and a top tier Tn including a single group containing all of the plurality of routers; and for all tiers 1?i?n, each tier-Ti?1 subgroup within a tier Ti group is connected by at least one link to all other tier-Ti?1 subgroups within the same tier Ti group.
    Type: Application
    Filed: September 15, 2014
    Publication date: January 14, 2016
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: BABA L. ARIMILLI, WOLFGANG DENZEL, PHILIP HEIDELBERGER, GERMAN RODRIGUEZ HERRERA, CHRISTOPHER J. JOHNSON, LONNY LAMBRECHT, CYRIEL MINKENBERG, BOGDAN PRISACARI