Abstract: A boost circuit is arranged to reduce rise and fall times of pulsed power used for pulsed control operation of electric machines. Magnetic energy present in the electric machine at the end of a pulse is extracted by the boost circuit to reduce the pulse fall time. The energy is stored by the boost circuit and then applied at the beginning of a subsequent pulse to reduce the rise time. By reducing rise and fall times compared to not using such a boost circuit, machine efficiency is improved.

Abstract: A pulsed control of an Externally Excited Synchronous Machines (EESM), including a boost circuit and method for (1) harvesting the field energy stored in rotor winding when the EESM is transitioning to the off state following an on pulses, (2) storing the harvested field energy on a storage device, (3) optionally “topping” up the harvested field energy stored on the storage device, and (4) supplying the harvested and stored field energy as a “boost voltage” to the rotor, just as the EESM is transitioning on for the next pulse, the boost voltage aiding the rotor in quickly overcoming it's start-up inductance, rapidly turning on the rotor, resulting in a much faster transition time from the off state to the on state at the start of the next pulse.

Abstract: A boost circuit and method is described for supplying a boost voltage to a rotor of the electric machine, just as the electric machine is pulsed on, the boost voltage aids the rotor in quickly overcoming its start-up inductance, rapidly turn on the rotor. As a result, much faster transition times are realized each time the electric machine transitions from the off state to the on state at the start of a pulse. By reducing the transition time, the overall efficiency of the electric machine is significantly improved.

Abstract: A boost circuit is arranged to reduce rise and fall times of pulsed power used for pulsed control operation of electric machines. Magnetic energy present in the electric machine at the end of a pulse is extracted by the boost circuit to reduce the pulse fall time. The energy is stored by the boost circuit and then applied at the beginning of a subsequent pulse to reduce the rise time. By reducing rise and fall times compared to not using such a boost circuit, machine efficiency is improved.

Abstract: A boost circuit is arranged to reduce rise and fall times of pulsed power used for pulsed control operation of electric machines. Magnetic energy present in the electric machine at the end of a pulse is extracted by the boost circuit to reduce the pulse fall time. The energy is stored by the boost circuit and then applied at the beginning of a subsequent pulse to reduce the rise time. By reducing rise and fall times compared to not using such a boost circuit, machine efficiency is improved.

Abstract: A boost circuit is arranged to reduce rise and fall times of pulsed power used for pulsed control operation of electric machines. Magnetic energy present in the electric machine at the end of a pulse is extracted by the boost circuit to reduce the pulse fall time. The energy is stored by the boost circuit and then applied at the beginning of a subsequent pulse to reduce the rise time. By reducing rise and fall times compared to not using such a boost circuit, machine efficiency is improved.

Abstract: A boost circuit is arranged to reduce rise and fall times of pulsed power used for pulsed control operation of electric machines. Magnetic energy present in the electric machine at the end of a pulse is extracted by the boost circuit to reduce the pulse fall time. The energy is stored by the boost circuit and then applied at the beginning of a subsequent pulse to reduce the rise time. By reducing rise and fall times compared to not using such a boost circuit, machine efficiency is improved.

Abstract: An amplifier is described which includes a first loop including a first amplifier stage having an offset voltage associated therewith. An output stage includes two switching devices in a bridge configuration configured to be coupled between a supply voltage and ground. An output of the bridge configuration is configured to be coupled to a load. The first loop is characterized by a first gain. A decoupling capacitor is configured to be coupled to the load. A second loop which includes the first amplifier stage is configured to charge the decoupling capacitor to a first voltage generated with reference to the offset voltage before operation of the switching devices is enabled. The second loop is characterized by a second gain. The first and second gains are substantially the same such that when operation of the switching devices is enabled a second voltage at the output of the half-bridge configuration is substantially the same as the first voltage.

Abstract: An amplifier is described which includes a first loop including a first amplifier stage having an offset voltage associated therewith. An output stage includes two switching devices in a bridge configuration configured to be coupled between a supply voltage and ground. An output of the bridge configuration is configured to be coupled to a load. The first loop is characterized by a first gain. A decoupling capacitor is configured to be coupled to the load. A second loop which includes the first amplifier stage is configured to charge the decoupling capacitor to a first voltage generated with reference to the offset voltage before operation of the switching devices is enabled. The second loop is characterized by a second gain. The first and second gains are substantially the same such that when operation of the switching devices is enabled a second voltage at the output of the half-bridge configuration is substantially the same as the first voltage.

Abstract: A generalized amplifier architecture is described which employs noise-shaping feedback, and for which the output waveform closely resembles the input waveform.

Abstract: A generalized amplifier architecture is described which employs noise-shaping feedback, and for which the output waveform closely resembles the input waveform.

Abstract: A generalized amplifier architecture is described which employs noise-shaping feedback, and for which the output waveform closely resembles the input waveform.

Abstract: A circuit for sensing a current in an inductor is described. Integrator circuitry is operable to generate a first signal representing an integration of a voltage across the inductor. Comparison circuitry is operable to generate a reset signal each time the first signal reaches either a positive or negative threshold. The reset signal is for resetting the integrator circuitry. Logic circuitry is operable to generate a count direction signal indicating which of the positive and negative thresholds was reached to generate the reset signal. Counter circuitry is operable to increment or decrement a count representing the current in the inductor in response to the reset and count direction signals.

Abstract: A switching circuit is described having an input stage having an input referred offset voltage associated therewith. An output stage has an output offset voltage associated therewith which is due at least in part to the input referred offset associated with the input stage. Offset cancellation circuitry is operable to cancel a portion of the input referred offset voltage before switching of the output stage is enabled thereby resulting in cancellation of the portion of the output offset voltage after switching of the output stage begins. The offset cancellation circuitry is further operable to release the input referred offset voltage after switching of the output stage begins thereby allowing the output offset voltage to drift.

Abstract: A generalized amplifier architecture is described which employs noise-shaping feedback, and for which the output waveform closely resembles the input waveform.

Abstract: An amplifier having output switch circuitry is described. A sense resistor is operable to transmit an output current associated with the output switch circuitry. Low-voltage circuitry is operable to provide a drive signal to the output switch circuitry. Isolation circuitry is operable to provide DC isolation between the low-voltage circuitry and the output switch circuitry. Current sensing circuitry is directly connected to the sense resistor and is operable to sense the output current in the sense resistor and generate a fault signal in response to an overcurrent condition. The fault signal is characterized by a signal level which is compatible with the low-voltage circuitry without additional DC isolation.

Abstract: A switching circuit is described having an input stage having an input referred offset voltage associated therewith. An output stage has an output offset voltage associated therewith which is due at least in part to the input referred offset associated with the input stage. Offset cancellation circuitry is operable to cancel a portion of the input referred offset voltage before switching of the output stage is enabled thereby resulting in cancellation of the portion of the output offset voltage after switching of the output stage begins. The offset cancellation circuitry is further operable to release the input referred offset voltage after switching of the output stage begins thereby allowing the output offset voltage to drift.

Abstract: An amplifier having output switch circuitry is described. A sense resistor is operable to transmit an output current associated with the output switch circuitry. Low-voltage circuitry is operable to provide a drive signal to the output switch circuitry. Isolation circuitry is operable to provide DC isolation between the low-voltage circuitry and the output switch circuitry. Current sensing circuitry is directly connected to the sense resistor and is operable to sense the output current in the sense resistor and generate a fault signal in response to an overcurrent condition. The fault signal is characterized by a signal level which is compatible with the low-voltage circuitry without additional DC isolation.

Abstract: A circuit for sensing a current in an inductor is described. Integrator circuitry is operable to generate a first signal representing an integration of a voltage across the inductor. Comparison circuitry is operable to generate a reset signal each time the first signal reaches either a positive or negative threshold. The reset signal is for resetting the integrator circuitry. Logic circuitry is operable to generate a count direction signal indicating which of the positive and negative thresholds was reached to generate the reset signal. Counter circuitry is operable to increment or decrement a count representing the current in the inductor in response to the reset and count direction signals.

Abstract: A switching circuit is described which includes an output switch having a drive terminal and a power supply terminal. Driver circuitry provides a drive signal to the output switch. Isolation circuitry provides DC isolation between the driver circuitry and the output switch. Transient control circuitry controls the drive terminal, thereby keeping the output switch off during stabilization of a supply voltage at the power supply terminal.