Patents by Inventor Babita DHAYAL

Babita DHAYAL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145410
    Abstract: Moisture hermetic guard ring structures for semiconductor devices, related systems, and methods of fabrication are disclosed. Such devices systems, and methods include a guard ring structure laterally surrounding semiconductor devices of a device layer and metal interconnects of an interconnect layer, the guard ring structure extending through the interconnect layer, the device layer, and a bonding layer adjacent one of the interconnect layer or the device layer the bonding layer, and contacting a support substrate coupled to the bonding layer. Such devices systems, and methods may further include via structures having the same material system as the guard ring structure and also extending through the interconnect, the device, and bonding layers and contacting a support substrate.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Applicant: Intel Corporation
    Inventors: Mohammad Kabir, Conor P. Puls, Babita Dhayal, Han Li, Keith E. Zawadzki, Hannes Greve, Avyaya Jayanthinarasimham, Mukund Bapna, Doug B. Ingerly
  • Publication number: 20240105577
    Abstract: Methods, systems, apparatus, and articles of manufacture to produce integrated circuit packages with grounding members are disclosed. An example semiconductor die disclosed herein includes a semiconductor substrate, metal interconnects proximate a first side of the semiconductor substrate, a metal contact proximate a second side of the semiconductor substrate opposite the first side, a first grounding member extending from a grounding interconnect of the metal interconnects to a first distal point in the semiconductor substrate, and a second grounding member extending from the metal contact to a second distal point in the semiconductor substrate, the first distal point closer to the first side of the semiconductor substrate than the second distal point is to the first side of the semiconductor substrate.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 28, 2024
    Inventors: Zhenguo Jiang, Zhiguo Qian, Jiwei Sun, Babita Dhayal
  • Publication number: 20230207700
    Abstract: Integrated circuit structures having partitioned source or drain contact structures, and methods of fabricating integrated circuit structures having partitioned source or drain contact structures, are described. For example, an integrated circuit structure includes a fin. A gate stack is over the fin. A first epitaxial source or drain structure is at a first end of the fin. A second epitaxial source or drain structure is at a second end of the fin. A conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures. The conductive contact structure has a first portion partitioned from a second portion.
    Type: Application
    Filed: February 23, 2023
    Publication date: June 29, 2023
    Inventors: Mauro J. KOBRINSKY, Stephanie BOJARSKI, Babita DHAYAL, Biswajeet GUHA, Tahir GHANI
  • Publication number: 20230197638
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques for a barrier that surrounds one or more dies which are electrically coupled with one or more electrical connections on a wafer. The barrier may be a hermetic barrier that is formed on a wafer prior to singulation to prevent moisture intrusion from a side of the wafer that may compromise the one or more electrical connections. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Inventors: Mohammad Enamul KABIR, Keith ZAWADZKI, Shakul TANDON, Christopher M. PELTO, John Kevin TAYLOR, Babita DHAYAL
  • Patent number: 11621354
    Abstract: Integrated circuit structures having partitioned source or drain contact structures, and methods of fabricating integrated circuit structures having partitioned source or drain contact structures, are described. For example, an integrated circuit structure includes a fin. A gate stack is over the fin. A first epitaxial source or drain structure is at a first end of the fin. A second epitaxial source or drain structure is at a second end of the fin. A conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures. The conductive contact structure has a first portion partitioned from a second portion.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: April 4, 2023
    Assignee: Intel Corporation
    Inventors: Mauro J. Kobrinsky, Stephanie Bojarski, Babita Dhayal, Biswajeet Guha, Tahir Ghani
  • Publication number: 20210407932
    Abstract: Moisture hermetic guard ring structures for semiconductor devices, related systems, and methods of fabrication are disclosed. Such devices systems, and methods include a guard ring structure laterally surrounding semiconductor devices of a device layer and metal interconnects of an interconnect layer, the guard ring structure extending through the interconnect layer, the device layer, and a bonding layer adjacent one of the interconnect layer or the device layer the bonding layer, and contacting a support substrate coupled to the bonding layer. Such devices systems, and methods may further include via structures having the same material system as the guard ring structure and also extending through the interconnect, the device, and bonding layers and contacting a support substrate.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Applicant: Intel Corporation
    Inventors: Mohammad Kabir, Conor P. Puls, Babita Dhayal, Han Li, Keith E. Zawadzki, Hannes Greve, Avyaya Jayanthinarasimham, Mukund Bapna, Doug B. Ingerly
  • Publication number: 20200075771
    Abstract: Integrated circuit structures having partitioned source or drain contact structures, and methods of fabricating integrated circuit structures having partitioned source or drain contact structures, are described. For example, an integrated circuit structure includes a fin. A gate stack is over the fin. A first epitaxial source or drain structure is at a first end of the fin. A second epitaxial source or drain structure is at a second end of the fin. A conductive contact structure is coupled to one of the first or the second epitaxial source or drain structures. The conductive contact structure has a first portion partitioned from a second portion.
    Type: Application
    Filed: September 5, 2018
    Publication date: March 5, 2020
    Inventors: Mauro J. KOBRINSKY, Stephanie BOJARSKI, Babita DHAYAL, Biswajeet GUHA, Tahir GHANI