Abstract: A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed.

Abstract: A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed.

Abstract: A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed.

Abstract: A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed.

Abstract: A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed.

Abstract: A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed.

Abstract: A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed.

Abstract: A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed.

Abstract: A line driver circuit can include an integrated circuit substrate of a first conductivity type having at least a first and a second well of a second conductivity type formed therein. The second well can be coupled to a first power supply node. A first transistor can be formed in the first well having a source coupled to a first input signal node, a drain coupled to a conductive line, and a gate coupled to a second input signal node. A second transistor can have a source coupled to a second power supply node, a drain coupled to the conductive line, and a gate coupled to the second input signal node. A third transistor can be formed in the second well and have a source coupled to the first power supply node, a drain coupled to the first well, and a gate coupled to receive a mode signal.

Abstract: A circuit (200) can include a bias protection circuit (204) and a reference circuit (202). A bias protection circuit (204) can generate an internal power supply voltage (Vsuppi) from a higher device power supply (Vcch) with low voltage transistors and no resistors. A lower internal power supply voltage (Vsuppi) can be provided by buffer transistors (M5 and M6) that are biased according to limit section (206) that generates a bias voltage (biasn2) based on a threshold voltage drop and a feedback bias voltage (biasn1) from reference circuit (202).

Abstract: A circuit (200) can include a reference circuit (202) and a start-up circuit (204). A start-up circuit (204) can include a low threshold voltage reference current device (N3) that can pull a start node (210) low in a start-up operation. This can enable activation device (P3), which can place reference circuit (202) in a stable operating mode. Operation of transistor (N3) can be essentially independent of a high power supply voltage and start-up circuit (204) can include no resistors.

Abstract: An adaptive output driver has a number of transistors connected in series between a power supply and a ground. An adaptive bias input is coupled to a gate of one of the transistors.

Abstract: A reference circuit can include a reference section that provides a reference value for other circuits of an integrated circuit and can be enabled and disabled in response to an enable signal. The reference circuit can include at least a first node, draw a reference current in the enabled mode, and draw essentially no current in the disabled mode. A pulse start-up section can provides a low impedance path between the first node and a first potential for a predetermined duration in response to the reference circuit being enabled. A continuous start-up section can provide a low impedance path between the first node and the first potential based on a logic state of an enable signal.

Abstract: A voltage regulator circuit has a standby amplifier with an output coupled to a gate of an output transistor. An active amplifier has an output coupled to the gate of the output transistor and to a gate of a replica follower transistor. A voltage regulated output is coupled to a source of the output transistor.

Abstract: A low voltage detect circuit is provided herein for detecting when an external voltage (Vext) drops below a predetermined minimum voltage. In general, the low voltage detect circuit described herein may be configured to detect a low voltage condition based on a threshold voltage difference between a non-zero threshold transistor having a substantially non-zero threshold voltage, and a zero threshold transistor having a threshold voltage relatively close to zero. According to a particularly advantageous aspect of the invention, the low voltage detect circuit described herein comprises substantially no resistors or reference voltage generation circuits, and therefore, provides significant savings in both current and die area consumption without sacrificing accuracy. The low voltage detect circuit of the present invention is particularly useful in power regulators, such as those used in memory systems or devices.

Abstract: A power-on reset (POR) circuit (200) can include a voltage divider section (202) having a first divider resistor (R21), a second divider resistor (R22), and a diode connected transistor (N22). Signal generator section (204) can include a transistor N21 that is activated according to a potential generated by voltage divider section (202). A trip point of a POR circuit (200) can be based on a difference between the threshold voltages of transistors N21 and N22, and thus less susceptible to variations in threshold voltage.

Abstract: The memory system has a current source architecture that has a separate current source for each group in a block of memory. When a leaky cell is detected, a fuse between the current source and the leaky group of cells is blown and a spare group of memory is substituted for the leaky group of memory. The current source architecture can be used in a current source test mode or in a current force test mode. The current source test mode detects if there is a leaky group of memory. In the current force test mode, the architecture determines the amount of current required by each group of memory to retain data. This information is then used to apply the required amount of current to each group of memory for data retention.

Abstract: A circuit (200) can include a reference circuit (202) and a start-up circuit (204). A start-up circuit (204) can include a low threshold voltage reference current device (N3) that can pull a start node (210) low in a start-up operation. This can enable activation device (P3), which can place reference circuit (202) in a stable operating mode. Operation of transistor (N3) can be essentially independent of a high power supply voltage and start-up circuit (204) can include no resistors.

Abstract: A low voltage detect and supply circuit (200) can include a detect circuit (202), a bias circuit (204) and a power supply transistor structure (P1). In operation, when a device power supply (Vext) remains above a predetermined limit, a detect circuit (202) can provide low impedance, thus maintaining transistor structure P1 in a high impedance state. When a device power supply (Vext) falls below a predetermined limit, a detect circuit can provide a high impedance. Embodiments of the circuit (200) do not include a differential voltage type comparator, and can be biased to draw relatively small amounts of current.

Abstract: A circuit (200) can include a bias protection circuit (204) and a reference circuit (202). A bias protection circuit (204) can generate an internal power supply voltage (Vsuppi) from a higher device power supply (Vcch) with low voltage transistors and no resistors. A lower internal power supply voltage (Vsuppi) can be provided by buffer transistors (M5 and M6) that are biased according to limit section (206) that generates a bias voltage (biasn2) based on a threshold voltage drop and a feedback bias voltage (biasn1) from reference circuit (202).