Abstract: The present disclosure relates to a memory device, and more particularly, to a memory device including a substrate, a plurality of vertical structures disposed on the substrate and including insulation layers and lower electrodes, which are alternately laminated with each other, wherein the vertical structures are aligned in a first direction parallel to a top surface of the substrate and a second direction crossing the first direction, an upper electrode disposed on a top surface and side surfaces of each of the vertical structures, and a first dielectric layer disposed between the upper electrode and the vertical structures to cover the top surface and the side surfaces of each of the vertical structures. Here, the first dielectric layer includes a ferroelectric material.

Abstract: The present disclosure relates to a memory device, and more particularly, to a memory device including a substrate, a plurality of vertical structures disposed on the substrate and including insulation layers and lower electrodes, which are alternately laminated with each other, wherein the vertical structures are aligned in a first direction parallel to a top surface of the substrate and a second direction crossing the first direction, an upper electrode disposed on a top surface and side surfaces of each of the vertical structures, and a first dielectric layer disposed between the upper electrode and the vertical structures to cover the top surface and the side surfaces of each of the vertical structures. Here, the first dielectric layer includes a ferroelectric material.

Abstract: A neuron circuit and an operating method thereof are disclosed. The neuron circuit may include an input unit to which an input pulse is applied, a bipolar memristor configured to have one end connected to one end of the input unit, a first capacitor configured to be connected between the one end of the bipolar memristor and a ground, a first diode configured to have an anode connected to the one end of the bipolar component, a second capacitor configured to have one end connected to a cathode of the first diode, a first switch configured to be connected between the one end of the second capacitor and the ground, and a second switch configured to be connected between the anode of the first diode and the other end of the second capacitor.

Abstract: Disclosed are a nanopipette provided with a membrane containing a saturated ion-sensitive material, a method for preparing the same, and an ion measuring apparatus comprising the same.

Abstract: Provided herein are a capacitor, a memory device including the capacitor, and a method of manufacturing the capacitor. The capacitor is manufactured by directly depositing a metal electrode having high ion mobility on an ultrathin ferroelectric layer having a certain thickness, and thus may simultaneously use metal cation migration and ferroelectric polarization inversion, and a low-power and high-performance capacitor capable of being selectively activated may be provided by simultaneously controlling an external electric field and an internal electric field caused by polarization of the inside of a ferroelectric thin film.

Abstract: Provided herein are a capacitor, a memory device including the capacitor, and a method of manufacturing the capacitor. The capacitor is manufactured by directly depositing a metal electrode having high ion mobility on an ultrathin ferroelectric layer having a certain thickness, and thus may simultaneously use metal cation migration and ferroelectric polarization inversion, and a low-power and high-performance capacitor capable of being selectively activated may be provided by simultaneously controlling an external electric field and an internal electric field caused by polarization of the inside of a ferroelectric thin film.

Abstract: Disclosed are a nanopipette provided with a membrane containing a saturated ion-sensitive material, a method for preparing the same, and an ion measuring apparatus comprising the same.

Abstract: There are provided a monocrystalline copper oxide (I) nanowire array manufacturing method using low-temperature electrochemical growth, and more particularly, to a manufacturing method allowing easy vapor deposition at low temperatures and also a monocrystalline copper oxide (I) nanowire array manufacturing method using low-temperature electrochemical growth which retains characteristics such as large-area growth, high-crystallinity nanowire, uniform radial distribution, easy length, radius adjustment, and the like. A monocrystalline copper oxide (I) nanowire array manufacturing method of the present invention includes a step of manufacturing a nanopore alumina layer (anodized alumina (AAO)) from a high-purity aluminum (Al) sheet by using a two-step anodic oxidation method; and a step of manufacturing a monocrystalline copper oxide (I) nanowire array by using the nanopore alumina layer as a nanopore molding flask by means of a low-temperature electrochemical growth method.

Abstract: A Schottky diode and a memory device including the same are provided. The Schottky diode includes a first metal layer and an Nb-oxide layer formed on the first metal layer.

Abstract: A dielectric composite material comprising at least two crystal phases of different components with TiO2 as a first component and a material selected from the group consisting of Ba1−xSrxTiO3 where x is from 0.3 to 0.7, Pb1−xCaxTiO3 where x is from 0.4 to 0.7, Sr1−xPbxTiO3 where x is from 0.2 to 0.4, Ba1−xCdxTiO3 where x is from 0.02 to 0.1, BaTi1−xZrxO3 where x is from 0.2 to 0.3, BaTi1−xSnxO3 where x is from 0.15 to 0.3, BaTi1−xHfxO3 where x is from 0.24 to 0.3, Pb1−1.3xLaxTiO3+0.2x where x is from 0.23 to 0.3, (BaTiO3)x(PbFeo0.5Nb0.5O3)1−x where x is from 0.75 to 0.9, (PbTiO3)−(PbCo0.5W0.5O3)1−x where x is from 0.1 to 0.45, (PbTiO3)x(PbMg0.5W0.5O3)1−x where x is from 0.2 to 0.4, and (PbTiO3)x(PbFe0.5Ta0.5O3)1−x where x is from 0 to 0.2, as the second component is described. The dielectric composite material can be formed as a thin film upon suitable substrates.

Abstract: A dielectric composite material comprising at least two crystal phases of different components with TiO2 as a first component and a material selected from the group consisting of Ba1−xSrxTiO3 where x is from 0.3 to 0.7, Pb1−xCaxTiO3 where x is from 0.4 to 0.7, Sr1−xPbxTiO3 where x is from 0.2 to 0.4, Ba1−xCdxTiO3 where x is from 0.02 to 0.1, BaTi1−xZrxO3 where x is from 0.2 to 0.3, BaTi1−xSnxO3 where x is from 0.15 to 0.3, BaTi1−xHfxO3 where x is from 0.24 to 0.3, Pb1-1.3xLaxTiO3+0.2x where x is from 0.23 to 0.3, (BaTiO3)x(PbFe0.5Nb0.5O3)1−x where x is from 0.75 to 0.9, (PbTiO3)x(PbCo0.5W0.5O3)1−x where x is from 0.1 to 0.45, (PbTiO3)x(PbMg0.5W0.5O3)1−x where x is from 0.2 to 0.4, and (PbTiO3)x(PbFe0.5Ta0.5O3)1−x where x is from 0 to 0.2, as the second component is described. The dielectric composite material can be formed as a thin film upon suitable substrates.

Abstract: A nonvolatile ferroelectric capacitor comprising Bi4−xAxTi3O12 thin film which is obtained by substituting at least some atoms of nonvolatile element A such as La for volatile Bi atoms in Bi4Ti3O2. Nonvolatile element A in perovskite layer of B4−xAxTi3O12 suppress the generation of oxygen vacancies in the perovskite layer, thereby improving fatigue behavior.