Abstract: An exposure mask is provided, which includes: a light blocking opaque area blocking incident light; a translucent area; and a transparent area passing the most of incident light, wherein the translucent area generates the phase differences in the range of about ?70° to about +70°.

Abstract: The present invention provides a method of manufacturing a TFT array panel in a cost-effective manner. The method includes: forming thin film transistors each having a gate electrode, a source electrode, and a drain electrode; forming an insulating layer on the thin film transistors; forming a first conductive layer electrically connected to the drain electrodes on the insulating layer; forming a second conductive layer on the first conductive layer; forming a photoresist layer including first portions and second portions thinner than the first portions; selectively etching the second conductive layer with a first etchant by using the photoresist layer as an etch blocker; and selectively etching the first conductive layer with a second etchant by using the photoresist layer and the second conductive layer as etch blockers.

Abstract: An exposure mask is provided, which includes: a light blocking opaque area blocking incident light; a translucent area; and a transparent area passing the most of incident light, wherein the translucent area generates the phase differences in the range of about ?70° to about +70°.

Abstract: A manufacturing method for an array substrate, comprising forming a gate metal on a base substrate, patterning the gate metal to form a gate part having a gate electrode, a gate line and a gate pad. Then, a gate insulating layer, an active layer and a data metal are sequentially formed on the base substrate to cover the gate part. The data metal is patterned to form a data part having a data electrode, a data pad and a pixel electrode. Then, the exposed portion of the active layer is removed, and the exposed portion of the gate insulation layer is removed. When the data electrode is divided into a source electrode and a drain electrode, a switching device is completed.

Abstract: An exposure mask is provided, which includes: a light blocking opaque area blocking incident light; a translucent area; and a transparent area passing the most of incident light, wherein the translucent area generates the phase differences in the range of about ?70° to about +70°.

Abstract: A method of forming a metal thin film includes positioning a substrate in a region corresponding to a target, with the target including silver (Ag) and being provided in a reaction space, supplying an inert gas and an oxygen-containing gas into the reaction space. Moreover, the method further includes forming a silver (Ag)-containing conductive film on the substrate by generating plasma between the target and the substrate.

Abstract: An exposure mask is provided, which includes: a light blocking opaque area blocking incident light; a translucent area; and a transparent area passing the most of incident light, wherein the translucent area generates the phase differences in the range of about ?70° to about +70°.

Abstract: The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer. The data wire includes a data line, a source electrode connected to the data line, a drain electrode facing the source electrode and a data pad connected to one end of the data line. A passivation layer is formed on the gate insulating layer while exposing the data pad and a portion of the data line close to the data pad.

Abstract: An exposure mask is provided, which includes: a light blocking opaque area blocking incident light; a translucent area; and a transparent area passing the most of incident light, wherein the translucent area generates the phase differences in the range of about ?70° to about +70°.

Abstract: The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer. The data wire includes a data line, a source electrode connected to the data line, a drain electrode facing the source electrode and a data pad connected to one end of the data line. A passivation layer is formed on the gate insulating layer while exposing the data pad and a portion of the data line close to the data pad.

Abstract: A method of forming a metal thin film includes positioning a substrate in a region corresponding to a target, with the target including silver (Ag) and being provided in a reaction space, supplying an inert gas and an oxygen-containing gas into the reaction space. Moreover, the method further includes forming a silver (Ag)-containing conductive film on the substrate by generating plasma between the target and the substrate.

Abstract: The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer. The data wire includes a data line, a source electrode connected to the data line, a drain electrode facing the source electrode and a data pad connected to one end of the data line. A passivation layer is formed on the gate insulating layer while exposing the data pad and a portion of the data line close to the data pad.

Abstract: A manufacturing method for an array substrate, comprising forming a gate metal on a base substrate, patterning the gate metal to form a gate part having a gate electrode, a gate line and a gate pad. Then, a gate insulating layer, an active layer and a data metal are sequentially formed on the base substrate to cover the gate part. The data metal is patterned to form a data part having a data electrode, a data pad and a pixel electrode. Then, the exposed portion of the active layer is removed, and the exposed portion of the gate insulation layer is removed. When the data electrode is divided into a source electrode and a drain electrode, a switching device is completed.

Abstract: The present invention provides a method of manufacturing a TFT array panel in a cost-effective manner. The method includes: forming thin film transistors each having a gate electrode, a source electrode, and a drain electrode; forming an insulating layer on the thin film transistors; forming a first conductive layer electrically connected to the drain electrodes on the insulating layer; forming a second conductive layer on the first conductive layer; forming a photoresist layer including first portions and second portions thinner than the first portions; selectively etching the second conductive layer with a first etchant by using the photoresist layer as an etch blocker; and selectively etching the first conductive layer with a second etchant by using the photoresist layer and the second conductive layer as etch blockers.

Abstract: An exposure mask is provided, which includes: a light blocking opaque area blocking incident light; a translucent area; and a transparent area passing the most of incident light, wherein the translucent area generates the phase differences in the range of about ?70° to about +70°.

Abstract: The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line extending in a first direction and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer.