Abstract: A programming method which controls the amount of a write current applied TO Phase-change Random Access Memory (PRAM), and a write driver circuit realizing the programming method. The programming method includes maintaining a ratio of a resistance of the PCM in the higher resistance state to a resistance of the phase change material (PCM) in the lower resistance state constant or substantially constant independent of an ambient temperature. The ratio may be maintained by increasing, decreasing or keeping the same a reset current and/or a set current.

Abstract: A semiconductor memory device compensates leakage current. A plurality of memory cells is disposed at intersections of word lines and bit lines. A plurality of dummy cells is connected to at least one dummy bit line. A leakage compensation circuit is connected to the at least one dummy bit line that outputs a leakage compensation current to at least one of the bit lines. A read current supply circuit outputs a read current necessary for a read operation to at least one of the bit lines in response to a first control signal. The memory device is a phase-change memory device containing phase-change material. The semiconductor memory device compensates leakage current in a read operation and supplies the leakage compensation current to a selected bit line, thereby suppressing error operation occurrence caused by leakage current.

Abstract: A method of programming a memory array including a plurality of memory cells is provided. The memory cells may include phase-change memory elements. In one aspect, the method includes applying in succession first through nth current pulses to each of the memory cells to be programmed to a first state (e.g., a crystalline state), where a current amplitude of the first through nth current pulses decreases with each successive pulse, and where a pulse duration of the first through nth current pulses increases with each successive pulse.

Abstract: A semiconductor memory device compensates leakage current. A plurality of memory cells is disposed at intersections of word lines and bit lines. A plurality of dummy cells is connected to at least one dummy bit line. A leakage compensation circuit is connected to the at least one dummy bit line that outputs a leakage compensation current to at least one of the bit lines. A read current supply circuit outputs a read current necessary for a read operation to at least one of the bit lines in response to a first control signal. The memory device is a phase-change memory device containing phase-change material. The semiconductor memory device compensates leakage current in a read operation and supplies the leakage compensation current to a selected bit line, thereby suppressing error operation occurrence caused by leakage current.

Abstract: A programming method which controls the amount of a write current applied to a Phase-change Random Access Memory (PRAM), and a write driver circuit realizing the programming method. The programming method includes maintaining a ratio of a resistance of the PCM in the higher resistance state to a resistance of the PCM in the lower resistance state constant or substantially constant independent of an ambient temperature. The ratio may be maintained by increasing, decreasing, or keeping the same a reset current and/or a set current.

Abstract: A programming method which controls the amount of a write current applied to a Phase-change Random Access Memory (PRAM), and a write driver circuit realizing the programming method. The programming method includes maintaining a ratio of a resistance of the PCM in the higher resistance state to a resistance of the Phase-change Memory (PCM) in the lower resistance state constant or substantially constant independent of an ambient temperature. The ratio may be maintained by increasing, decreasing, or keeping the same a reset current and/or a set current.

Abstract: A programming method which controls the amount of a write current applied to a Phase-change Random Access Memory (PRAM), and a write driver circuit realizing the programming method. The programming method includes maintaining a ratio of a resistance of the PCM in the higher resistance state to a resistance of the PCM in the lower resistance state constant or substantially constant independent of an ambient temperature. The ratio may be maintained by increasing, decreasing, or keeping the same a reset current and/or a set current.

Abstract: A CMOS input buffer for semiconductor devices, that is capable of protecting its MOS transistors from gate oxide breakdown due to the application of high voltage greater than a normal power supply voltage.