Abstract: A semiconductor device includes a channel layer, a gate electrode facing the channel layer, a gate insulating layer between the channel layer and the gate electrode, and a source electrode and a drain electrode electrically connected to the channel layer. The channel layer includes a semiconductor material having a two-dimensional crystal structure, and the gate insulating layer includes a three-dimensional bulk paraelectric material including zirconium oxide and an oxide of a metal having a valence of +3 or +4.

Abstract: Provided are semiconductor devices, electronic apparatuses including the same, and methods of manufacturing the semiconductor device. The semiconductor device includes a substrate, a patterning layer on the substrate, a channel arrange on the patterning layer and including a two-dimensional (2D) material, a source electrode and a drain electrode electrically connected to the channel, a gate electrode on the channel, and a gate insulating film between the channel and the gate electrode, wherein the channel may include a channel area having a relatively thin thickness and a contact area having relatively thick thickness.

Abstract: Provided is a semiconductor device including a channel layer including a van der Waals material, an interlayer arranged on the channel layer and including a semiconductor or an insulator, and a dopant, a gate insulating layer arranged on the interlayer, and a gate electrode arranged on the gate insulating layer.

Abstract: A semiconductor device may include a plurality of gate bridges, a gate via connecting the plurality of gate bridges to each other, a channel layer between the plurality of gate bridges, and a source electrode apart from the gate via in a first direction. The plurality of gate bridges may pass through a portion of the source electrode.

Abstract: A semiconductor device includes a substrate, a source electrode on the substrate, a drain electrode being apart from the source electrode, a channel connecting the source electrode to the drain electrode and including a two-dimensional material, a gate insulating layer on the channel, and a gate electrode on the gate insulating layer, wherein the gate electrode includes an overlap area facing the source electrode in a vertical direction.

Abstract: A vertical structure semiconductor device may include a first electrode layer including a transition metal element, a mask layer including a metal oxide where the mask layer may be on the first electrode layer and may expose a portion of a surface of the first electrode layer through channel growth regions in the mask layer, channels each including a transition metal dichalcogenide, a first gate electrode on the mask layer and surrounding each of the channels, a gate insulating layer on the mask layer and between the first gate electrode and the channels, and a second electrode layer. A first end of the channels may be on the portion of the surface of first electrode layer. The second electrode layer may contact a second end of the channels. The transition metal dichalcogenide of the channels may include the transition metal element of the first electrode layer.

Abstract: A semiconductor device may include a gate electrode, a metal nitride layer on the gate electrode, a gate insulating film on the metal nitride layer, a channel on the gate insulating film, a source electrode in one side of the channel, and a drain electrode in another side of the channel.

Abstract: A semiconductor device includes a metal nitride layer, a channel provided in the metal nitride layer and including a two-dimensional (2D) semiconductor material, a source electrode provided on one side of the channel, a drain electrode provided on another side of the channel, a gate insulating layer provided in the channel, and a gate electrode provided on the gate insulating layer.

Abstract: A thin film structure according to various example embodiments includes a first buffer layer, a transition metal dichalcogenide layer on the first buffer layer, and a second buffer layer on the transition metal dichalcogenide layer, wherein the second buffer layer includes same chalcogen element as a chalcogen element included in the transition metal dichalcogenide layer.

Abstract: An interconnect structure may include a first dielectric layer including a trench, a first conductive layer in the trench and including a plurality of first graphene layers stacked in a direction from an inner surface of the trench toward a center of the trench, a second dielectric layer on the first dielectric layer and including a through hole extending to the trench, and a second conductive layer in the through hole.

Abstract: Provided are a graphene interconnect structure, an electronic device including the graphene interconnect structure, and a method of manufacturing the graphene interconnect structure. The graphene interconnect structure may include: a first oxide dielectric material layer; a second oxide dielectric material layer on a surface of the first oxide dielectric material layer and having a dielectric constant greater than that of the first oxide dielectric material layer; and a graphene layer on a surface of the second oxide dielectric material layer opposite to the surface on which the first oxide dielectric material layer is located.