Patents by Inventor Bai-rou Ni

Bai-rou Ni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090008781
    Abstract: A semiconductor device structure includes a substrate, a first conductive layer over the substrate, a second conductive layer between the first conductive layer and the substrate and extending over the sidewalls of the first conductive layer, a dielectric layer between the second conductive layer and the substrate, a cap layer over the first conductive layer and the second conductive layer, and a liner layer on the sidewalls of the second conductive layer.
    Type: Application
    Filed: September 15, 2008
    Publication date: January 8, 2009
    Applicant: ProMOS Technologies Inc.
    Inventors: Bai-rou Ni, Fang-Yu Yeh, Yueh-Chuan Lee
  • Publication number: 20060017165
    Abstract: A method of manufacturing a semiconductor device comprises the steps as follow. After forming an insulating layer with opening therein over a substrate, a polysilicon layer that partially fills the opening is formed over the substrate and then a refractory metal silicide layer that completely fills the opening is formed over the substrate. Thereafter, the polysilicon layer and the refractory metal silicide layer outside the opening are removed to expose the insulating layer. A portion of the polysilicon layer and the refractory metal silicide layer are etched back so that the surface of the polysilicon layer and the refractory metal silicide layer are below the surface of the insulating layer. After forming a cap layer over the polysilicon layer and the refractory metal silicide layer, the insulating layer is removed and then a liner layer is formed on the sidewalls of the polysilicon layer.
    Type: Application
    Filed: October 5, 2005
    Publication date: January 26, 2006
    Inventors: Bai-rou Ni, Fang-Yu Yeh, Yueh-Chuan Lee
  • Publication number: 20040121166
    Abstract: A method of manufacturing a semiconductor device comprises the steps as follow. After forming an insulating layer with opening therein over a substrate, a polysilicon layer that partially fills the opening is formed over the substrate and then a refractory metal silicide layer that completely fills the opening is formed over the substrate. Thereafter, the polysilicon layer and the refractory metal silicide layer outside the opening are removed to expose the insulating layer. A portion of the polysilicon layer and the refractory metal silicide layer are etched back so that the surface of the polysilicon layer and the refractory metal silicide layer are below the surface of the insulating layer. After forming a cap layer over the polysilicon layer and the refractory metal silicide layer, the insulating layer is removed and then a liner layer is formed on the sidewalls of the polysilicon layer.
    Type: Application
    Filed: April 3, 2003
    Publication date: June 24, 2004
    Inventors: Bai-rou Ni, Fang-Yu Yeh, Yueh-Chuan Lee