Patents by Inventor Baixiang Han

Baixiang Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12361881
    Abstract: A display panel comprises a display portion comprising sub-pixel rows and a gate driver circuit comprising gate driver units in cascade. Each sub-pixel row comprises sub-pixel units, and a pixel circuit comprising a switching transistor, a first reset transistor and a second reset transistor is provided in each sub-pixel unit. Each gate driver unit comprises first and second signal output terminals. Agate of the switching transistor in a b-th row is connected to the second signal output terminal of the gate driver unit at an a-th stage, a gate of the first reset transistor in the b-th row is connected to the first signal output terminal of the gate driver unit at a b-th stage, and a gate of the second reset transistor in the b-th row is connected to the first signal output terminal of the gate driver unit at a c-th stage.
    Type: Grant
    Filed: January 31, 2024
    Date of Patent: July 15, 2025
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Xiang Zhou, Weiyao Wei, Baixiang Han, Guangyao Li
  • Publication number: 20250201188
    Abstract: A display panel comprises a display portion comprising sub-pixel rows and a gate driver circuit comprising gate driver units in cascade. Each sub-pixel row comprises sub-pixel units, and a pixel circuit comprising a switching transistor, a first reset transistor and a second reset transistor is provided in each sub-pixel unit. Each gate driver unit comprises first and second signal output terminals. A gate of the switching transistor in a b-th row is connected to the second signal output terminal of the gate driver unit at an a-th stage, a gate of the first reset transistor in the b-th row is connected to the first signal output terminal of the gate driver unit at a b-th stage, and a gate of the second reset transistor in the b-th row is connected to the first signal output terminal of the gate driver unit at a c-th stage.
    Type: Application
    Filed: January 31, 2024
    Publication date: June 19, 2025
    Inventors: Xiang ZHOU, Weiyao WEI, Baixiang HAN, Guangyao LI
  • Publication number: 20250160124
    Abstract: The embodiments of the present application disclose a flexible display panel and a method of manufacturing the same. By providing a recess on a position of a pixel definition layer corresponding to a region between two adjacent sub-pixel regions, the recess can increase a contact area between a second electrode and the pixel definition layer, thereby improving adhesion force of the second electrode and avoiding image abnormality caused by the second electrode being peeled off from the pixel definition layer during bending of the flexible display panel.
    Type: Application
    Filed: January 20, 2022
    Publication date: May 15, 2025
    Inventors: Baixiang HAN, Zhenyang QIAO, Xiang YIN
  • Patent number: 12300145
    Abstract: A gate driving circuit includes a plurality of stages of gate driving units and at least one repair line. A nth stage gate driving unit in the plurality of stages of gate driving units is connected to at least a first control signal line configured to receive a nth stage scan signal. The nth stage gate driving unit is configured to output a nth stage pulse signal under a control of the nth stage scan signal. The repair line intersects with the first control signal line, and disposed in different layers from the first control signal line. The repair line is configured to transmit a mth stage scan signal, both of n and m are positive integers greater than 0, and n is greater than or less than m.
    Type: Grant
    Filed: August 29, 2023
    Date of Patent: May 13, 2025
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Zhenyang Qiao, Liuqi Zhang, Baixiang Han
  • Publication number: 20250140145
    Abstract: A gate driving circuit includes gate driving units. Each of the gate driving units includes a node voltage control module and a pull-down module. The node voltage control module includes a first module and a storage module. The first module outputs a first voltage signal at a first node in response to a pull-down control signal at a first control port. The storage module includes a first port receiving the first voltage signal, and a second terminal electrically connected to the first node. The pull-down module outputs a first working signal for controlling a plurality of sub-pixels to turn off at an output port of the gate driving unit in response to the first voltage signal. The storage module maintains the first voltage signal applied on the first node to maintain the first working signal at the output port of the gate driving unit controlled by the pull-down module.
    Type: Application
    Filed: December 31, 2023
    Publication date: May 1, 2025
    Applicant: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Xiang ZHOU, Baixiang HAN, Guangyao LI
  • Publication number: 20250131863
    Abstract: A gate driving circuit includes a gate driving unit arranged in a multi-stage cascade. The gate driving unit includes a pull-up control module, a pull-up node, a first output module, a second output module, a pull-down control module, a first pull-down module, a pull-down node, a second pull-down module, and a pull-down maintenance module. The pull-up control module is configured to pull up a potential of the pull-up node under a control of a first clock signal input at a first clock signal input terminal. The pull-down control module is configured to pull up a potential of the pull-down node under a control of the first clock signal. The first pull-down module is configured to pull the potential of the pull-down node down to a potential of the first clock signal under a control of the potential of the pull-up node.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 24, 2025
    Applicant: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Xiang ZHOU, Baixiang HAN, Guangyao LI
  • Patent number: 12277882
    Abstract: A gate driving circuit includes gate driving units. Each of the gate driving units includes a node voltage control module and a pull-down module. The node voltage control module includes a first module and a storage module. The first module outputs a first voltage signal at a first node in response to a pull-down control signal at a first control port. The storage module includes a first port receiving the first voltage signal, and a second terminal electrically connected to the first node. The pull-down module outputs a first working signal for controlling a plurality of sub-pixels to turn off at an output port of the gate driving unit in response to the first voltage signal. The storage module maintains the first voltage signal applied on the first node to maintain the first working signal at the output port of the gate driving unit controlled by the pull-down module.
    Type: Grant
    Filed: December 31, 2023
    Date of Patent: April 15, 2025
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Xiang Zhou, Baixiang Han, Guangyao Li
  • Patent number: 12277884
    Abstract: A gate driving circuit includes a gate driving unit arranged in a multi-stage cascade. The gate driving unit includes a pull-up control module, a pull-up node, a first output module, a second output module, a pull-down control module, a first pull-down module, a pull-down node, a second pull-down module, and a pull-down maintenance module. The pull-up control module is configured to pull up a potential of the pull-up node under a control of a first clock signal input at a first clock signal input terminal. The pull-down control module is configured to pull up a potential of the pull-down node under a control of the first clock signal. The first pull-down module is configured to pull the potential of the pull-down node down to a potential of the first clock signal under a control of the potential of the pull-up node.
    Type: Grant
    Filed: December 7, 2023
    Date of Patent: April 15, 2025
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Xiang Zhou, Baixiang Han, Guangyao Li
  • Publication number: 20250107382
    Abstract: A display panel and a display device are provided. First pixel units in each of first pixel unit rows are misaligned with first pixel units of an adjacent first pixel unit row along a first direction. First pixel units in each of first pixel unit columns are misaligned with first pixel units of an adjacent first pixel unit column along a second direction. A projection of the first pixel units of one of the first pixel unit rows at least partially overlaps with a projection of second pixel units and third pixel units of an adjacent second pixel unit row along the first direction. A projection of the first pixel units of one of the first pixel unit columns at least partially overlaps with a projection of second pixel units and third pixel units of an adjacent second pixel unit column along the second direction.
    Type: Application
    Filed: September 25, 2024
    Publication date: March 27, 2025
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Xi XIAO, Guangyao LI, Baixiang HAN
  • Patent number: 12256624
    Abstract: A display panel and a manufacturing method thereof are provided. The display panel comprises a first substrate, a driving circuit layer disposed on a side of the first substrate, a light-emitting device layer disposed on a side of the driving circuit layer away from the first substrate, a second substrate disposed on a side of the light-emitting device layer away from the driving circuit layer, and a stress releasing layer disposed on a side of the second substrate close to the light-emitting device layer. The stress releasing layer is disposed corresponding to the non-display region, and a concave section is disposed in the stress releasing layer.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: March 18, 2025
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Zhenyang Qiao, Baixiang Han
  • Patent number: 12207514
    Abstract: The present application provides a flexible display panel including: an underlay substrate; at least one first conductive line being continuous line-shaped, disposed on the underlay substrate; at least one second conductive line being broken line-shaped, corresponding to the first conductive line, and disposed on the first conductive line, wherein each of the second conductive line includes a plurality of conductive line sections, the conductive line sections are spaced from one another, and is electrically connected to a corresponding one of the first conductive line. A rigidity of the first conductive line is less than a rigidity of the conductive line sections, and a conductivity of the conductive line sections is greater than a conductivity of the first conductive line. The configuration of the first conductive line and the second conductive line makes the flexible display panel have both rigidity and conductivity.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: January 21, 2025
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Weiran Cao, Weijing Zeng, Baixiang Han
  • Patent number: 12183236
    Abstract: The present application provides a gate driving circuit, a driving method, and a display panel. The gate driving circuit includes a pull-up control module, a pull-up module, a pull-down control module, a pull-down module, and a voltage stabilizing module. The pull-down node and the pull-up control module are connected to the voltage stabilizing module, which is not only reduce a leakage current of the pull-down node in the high potential state to stabilize the high potential of the pull-down node, but also maintain the level of the pull-down node in the low potential state to stabilize the low potential of the pull-down node.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: December 31, 2024
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Zhenyang Qiao, Liuqi Zhang, Baixiang Han
  • Patent number: 12174497
    Abstract: A display panel and a display device are provided. The display panel has a first area, a second area, and a third area arranged in sequence. The display panel includes a substrate, a plurality of first wirings, and a plurality of second wirings. The first wirings extend from the first area to the second area. The second wirings extend from the second area to the third area. The first wirings and the second wirings are arranged in different layers. The first wirings and the second wirings are connected in a one-to-one correspondence through via holes. The via holes are staggered in the second area.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: December 24, 2024
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Mingming Li, Baixiang Han
  • Publication number: 20240379042
    Abstract: A gate driving circuit includes a plurality of stages of gate driving units and at least one repair line. A nth stage gate driving unit in the plurality of stages of gate driving units is connected to at least a first control signal line configured to receive a nth stage scan signal. The nth stage gate driving unit is configured to output a nth stage pulse signal under a control of the nth stage scan signal. The repair line intersects with the first control signal line, and disposed in different layers from the first control signal line. The repair line is configured to transmit a mth stage scan signal, both of n and m are positive integers greater than 0, and n is greater than or less than m.
    Type: Application
    Filed: August 29, 2023
    Publication date: November 14, 2024
    Applicant: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Zhenyang QIAO, Liuqi ZHANG, Baixiang HAN
  • Patent number: 12067937
    Abstract: A display panel is disclosed. The display panel includes a pixel driving circuit. The pixel driving circuit includes: a first transistor, wherein the first transistor and a light-emitting device are series-connected between a first power line and a second power line; and a second transistor, wherein the second transistor and the light-emitting device are series-connected between the first power line and the second power line. A width-to-length ratio of the first transistor is greater than a width-to-length ratio of the second transistor. A display device is further disclosed.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: August 20, 2024
    Inventors: Weiran Cao, Kuo Gao, Baixiang Han
  • Patent number: 12048112
    Abstract: A display panel and a display device include a bending region and a non-bending region. The display panel includes a flexible display substrate, a protective film disposed on a surface of the flexible display substrate and covering the non-bending region, and a protective film disposed on a surface of the flexible display substrate and covering the non-bending region. A hollow part is formed in a border region of the bending region and the non-bending region, and the protective adhesive is filled in the hollow part and contacts to the protective film. A technical problem of low reliability of current display panels can be relieved.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: July 23, 2024
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Weiran Cao, Weiyao Wei, Baixiang Han
  • Publication number: 20240244927
    Abstract: A display panel and a manufacturing method thereof are provided. The display panel comprises a first substrate, a driving circuit layer disposed on a side of the first substrate, a light-emitting device layer disposed on a side of the driving circuit layer away from the first substrate, a second substrate disposed on a side of the light-emitting device layer away from the driving circuit layer, and a stress releasing layer disposed on a side of the second substrate close to the light-emitting device layer. The stress releasing layer is disposed corresponding to the non-display region, and a concave section is disposed in the stress releasing layer.
    Type: Application
    Filed: February 14, 2022
    Publication date: July 18, 2024
    Inventors: Zhenyang QIAO, Baixiang HAN
  • Publication number: 20240233593
    Abstract: The present application provides a gate driving circuit, a driving method, and a display panel. The gate driving circuit includes a pull-up control module, a pull-up module, a pull-down control module, a pull-down module, and a voltage stabilizing module. The pull-down node and the pull-up control module are connected to the voltage stabilizing module, which is not only reduce a leakage current of the pull-down node in the high potential state to stabilize the high potential of the pull-down node, but also maintain the level of the pull-down node in the low potential state to stabilize the low potential of the pull-down node.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 11, 2024
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Zhenyang Qiao, Liuqi Zhang, Baixiang Han
  • Publication number: 20240221554
    Abstract: A display panel is provided, including a display area, a non-display area, signal lines arranged in the display area, test pads, test lines arranged in the non-display area, and first electrostatic protection units. Each test line is electrically connected to each respective signal line. One end of each test pad is electrically connected to each respective test line. Another end of each test pad is electrically connected to a common line. One end of each first electrostatic protection unit is connected to the corresponding test pad, and another end of each first electrostatic protection unit is electrically connected to the common line. By placing the first electrostatic protection units on one side of the test pads away from the display area, when testing the display panel through the test pads, the first electrostatic protection units effectively protect circuits of the display panel and prevent issues such as ESD electrostatic damage.
    Type: Application
    Filed: October 25, 2023
    Publication date: July 4, 2024
    Inventors: Wu CAO, Longqiang SHI, Baixiang HAN
  • Patent number: 12007805
    Abstract: A foldable display panel and a manufacturing method of the display panel are provided. A plurality of photo spacers are disposed in a first region of the foldable display panel, i.e., the plurality of photo spacers are disposed at a folded position. Widths of the photo spacers gradually decrease from a flexible substrate to a direction away from the flexible substrate. When the foldable display panel is folded, the photo spacers can cooperate with a folding curve to contact with each other, thereby reducing extrusion between the plurality of photo spacers.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: June 11, 2024
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Kang Liu, Baixiang Han