Abstract: An audio processor may process dissimilarly formatted digital audio signals and produce an analog output for reproduction by a transducer, such as a speaker. The audio processor may be, for example, a digital-to-analog converter (DAC) with multiple digital inputs and a single analog output. The audio processor may also include other components, such as processing components, filters, equalizers, amplifiers, and the like. The audio processor may process audio, such as high fidelity DSD audio and lower fidelity PCM audio, and combine the differently formatted data into a single output. During processing, the audio processor may manipulate the different audio signals, such as by ducking a music playback to allow a notification sound to be played.

Abstract: The behavior of a NOS DAC and an analog filter may be emulated by electronic components of an integrated circuit (IC) by upsampling data and applying a digital filter to the upsampled data. For example, the IC may include a zero-order-hold circuit that upsamples data from a first input sample rate to a second, higher input rate. The upsampled data may be passed to an Asynchronous Sample Rate Converter (ASRC) that performs further upsampling (e.g., from 8*Fs-64*Fs). The upsampled data may be passed to a digital low pass filter. The digital low pass filter may emulate, for example, a response of a fifth order Butterworth analog filter to mimic the effect of analog processing. The IC may integrate the upsampling circuit, the low pass digital filter, a digital-to-analog converter (DAC) and an amplifier to provide an audio solution for playing high-fidelity music in a mobile device.

Abstract: An audio processor may process dissimilarly formatted digital audio signals and produce an analog output for reproduction by a transducer, such as a speaker. The audio processor may be, for example, a digital-to-analog converter (DAC) with multiple digital inputs and a single analog output. The audio processor may also include other components, such as processing components, filters, equalizers, amplifiers, and the like. The audio processor may process audio, such as high fidelity DSD audio and lower fidelity PCM audio, and combine the differently formatted data into a single output. During processing, the audio processor may manipulate the different audio signals, such as by ducking a music playback to allow a notification sound to be played.

Abstract: The behavior of a NOS DAC and an analog filter may be emulated by electronic components of an integrated circuit (IC) by upsampling data and applying a digital filter to the upsampled data. For example, the IC may include a zero-order-hold circuit that upsamples data from a first input sample rate to a second, higher input rate. The upsampled data may be passed to an Asynchronous Sample Rate Converter (ASRC) that performs further upsampling (e.g., from 8*Fs-64*Fs). The upsampled data may be passed to a digital low pass filter. The digital low pass filter may emulate, for example, a response of a fifth order Butterworth analog filter to mimic the effect of analog processing. The IC may integrate the upsampling circuit, the low pass digital filter, a digital-to-analog converter (DAC) and an amplifier to provide an audio solution for playing high-fidelity music in a mobile device.

Abstract: A system and method utilize multiple, asynchronous, voltage isolated integrated power data circuits (IPDCs) to respectively determine one or more power parameters of a multi-phase power distribution system. In at least one embodiment, the power parameters represent differences between voltage phases of a multi-phase power distribution system. In at least one embodiment, the IPDCs each sense a voltage or current from a single phase of a three-phase power distribution system. Additionally, the IPDCs are electrically isolated from each other and, thus, in at least one embodiment, can utilize voltage divider or shunt resistor sensing without being subject to high voltages representative of the difference between voltage phases. Additionally, in at least one embodiment, each of the IPDCs utilizes a separate clock signal to determine phase sequence and phase angle deltas of one or more three phase voltages of the three-phase power distribution system.