Patents by Inventor Balasubramanian Anand
Balasubramanian Anand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9996728Abstract: A system and a method for enabling a fingerprint registration on a mobile device are provided. The mobile device includes a fingerprint registration unit configured to receive at least one first image of a fingerprint input in a first orientation, receive at least one second image of the fingerprint input in a second orientation, and generate a fingerprint image by stitching the at least one first image with the at least one second image such that the first orientation and the second orientation are substantially perpendicular to each other.Type: GrantFiled: January 27, 2016Date of Patent: June 12, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Jidnya Samir Shah, Ankit Vijay, Balasubramanian Anand, Rangavittal Narayanan, Shankar Venkatesan, Adil Hamid Malla, Aloknath De, Shreyasi Das, Surbhi Mathur
-
Publication number: 20160217310Abstract: A system and a method for enabling a fingerprint registration on a mobile device are provided. The mobile device includes a fingerprint registration unit configured to receive at least one first image of a fingerprint input in a first orientation, receive at least one second image of the fingerprint input in a second orientation, and generate a fingerprint image by stitching the at least one first image with the at least one second image such that the first orientation and the second orientation are substantially perpendicular to each other.Type: ApplicationFiled: January 27, 2016Publication date: July 28, 2016Inventors: Jidnya Samir SHAH, Ankit VIJAY, Balasubramanian ANAND, Rangavittal NARAYANAN, Shankar VENKATESAN, Adil Hamid MALLA, Aloknath DE, Shreyasi DAS, Surbhi MATHUR
-
Patent number: 9081412Abstract: A system and method for using paper to interface with handwritten annotations and/or pre-defined templates with one or more computer applications is disclosed. In one embodiment, the method includes imaging content in the paper including pre-defined handwritten commands, associated syntax, one or more computer application identifiers and pointed data which is already existing on the paper, analyzing the imaged content to identify the pre-defined handwritten commands, the one or more computer applications associated with the one or more computer application identifiers, the associated syntax and the pointed data, extracting the pointed data into a specified format associated with the one or more computer applications, executing the one or more computer applications based on the identified pre-defined handwritten commands, the one or more computer application identifiers and the associated syntax, and importing the extracted pointed data into the one or more executed computer applications.Type: GrantFiled: November 25, 2010Date of Patent: July 14, 2015Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Suryaprakash Kompalli, Kiran Kumar Bhuvanagiri, Anjaneyulu Seetha Rama Kuchibhotla, Sitaram Ramachandrula, Sriganesh Madhvanath, Shekhar Ramachandra Borgaonkar, Balasubramanian Anand
-
Patent number: 8879854Abstract: An apparatus and method are provided for recognizing an emotion of an individual based on Action Units. The method includes receiving an input AU string including one or more AUs that represents a facial expression of an individual from an AU detector; matching the input AU string with each of a plurality of AU strings, wherein each of the plurality of AU strings includes a set of highly discriminative AUs, each representing an emotion; identifying an AU string from the plurality of AU strings that best matches the input AU string; and outputting an emotion label corresponding to the best matching AU string that indicates the emotion of the individual.Type: GrantFiled: October 21, 2011Date of Patent: November 4, 2014Assignee: Samsung Electronics Co., LtdInventors: Sudha Velusamy, Hariprasad Kannan, Balasubramanian Anand, Anshul Sharma
-
Patent number: 8295295Abstract: A system and a method for automatically segmenting and merging routing domains within a network. The system includes one or more gateway devices and a plurality of nodes segmented into one or more routing domains. Each of said plurality of nodes maintains a single gateway device from among said plurality of gateway devices as the node's primary gateway at any time. Each of said gateway devices possesses a gateway color attribute. Each of said plurality of nodes maintains a node color attribute value whose value is derived from the value of said gateway color attribute of then node's primary gateway. Each node's routing domain is determined by the node's color attribute value.Type: GrantFiled: January 24, 2007Date of Patent: October 23, 2012Assignee: Cooper Technologies CompanyInventors: Timothy Clark Winter, Minakshisundaran Balasubramanian Anand, Prakash Chakravarthi
-
Publication number: 20120101735Abstract: An apparatus and method are provided for recognizing an emotion of an individual based on Action Units. The method includes receiving an input AU string including one or more AUs that represents a facial expression of an individual from an AU detector; matching the input AU string with each of a plurality of AU strings, wherein each of the plurality of AU strings includes a set of highly discriminative AUs, each representing an emotion; identifying an AU string from the plurality of AU strings that best matches the input AU string; and outputting an emotion label corresponding to the best matching AU string that indicates the emotion of the individual.Type: ApplicationFiled: October 21, 2011Publication date: April 26, 2012Applicant: Samsung Electronics Co., Ltd.Inventors: Sudha VELUSAMY, Hariprasad Kannan, Balasubramanian Anand, Anshul Sharma
-
Patent number: 8164481Abstract: A system and method for conducting bi-directional communication sessions with sensing and control devices, such as utility meters, from a mobile device. A system for conducting bi-directional communication sessions with utility meters from a mobile device includes a mobile device capable of acquiring a communication session with a meter unit connected to a utility meter, a vehicle in which the mobile device is located, and a plurality of meter units connected to a plurality of utility meters. The meter units are capable of receiving and executing commands to obtain data and perform actions on the utility meters. The actions include a peak consumption value reset of the utility meter. Each command message includes a token that enables the endpoint radio transceiver devices to determine the commanded one or more operations have been performed.Type: GrantFiled: February 27, 2008Date of Patent: April 24, 2012Assignee: Cooper Technologies CompanyInventors: Arthur John Klaus, Timothy Clark Winter, Minakshisundaran Balasubramanian Anand
-
Publication number: 20080175257Abstract: A system and a method for automatically segmenting and merging routing domains within a network. The system includes one or more gateway devices and a plurality of nodes segmented into one or more routing domains. Each of said plurality of nodes maintains a single gateway device from among said plurality of gateway devices as the node's primary gateway at any time. Each of said gateway devices possesses a gateway color attribute. Each of said plurality of nodes maintains a node color attribute value whose value is derived from the value of said gateway color attribute of then node's primary gateway. Each node's routing domain is determined by the node's color attribute value.Type: ApplicationFiled: January 24, 2007Publication date: July 24, 2008Inventors: Timothy Clark Winter, Minakshisundaran Balasubramanian Anand, Prakash Chakravarthi
-
Publication number: 20080150752Abstract: A system and method for conducting bi-directional communication sessions with sensing and control devices, such as utility meters, from a mobile device. A system for conducting bi-directional communication sessions with utility meters from a mobile device includes a mobile device capable of acquiring a communication session with a meter unit connected to a utility meter, a vehicle in which the mobile device is located, and a plurality of meter units connected to a plurality of utility meters. The meter units are capable of receiving and executing commands to obtain data and perform actions on the utility meters. The actions include a peak consumption value reset of the utility meter. Each command message includes a token that enables the endpoint radio transceiver devices to determine the commanded one or more operations have been performed.Type: ApplicationFiled: February 27, 2008Publication date: June 26, 2008Inventors: Arthur John Klaus, Timothy Clark Winter, Minakshisundaran Balasubramanian Anand
-
Publication number: 20080117076Abstract: An system and a method for conducting bi-directional communication sessions with sensing and control devices, such as utility meters, from a mobile device. A system for conducting bi-directional communication sessions with utility meters from a mobile device includes a mobile device capable of acquiring a communication session with a meter unit connected to a utility meter, a vehicle in which the mobile device is located, and a plurality of meter units connected to a plurality of utility meters. The meter units are capable of receiving and executing commands to obtain data and perform actions on the utility meters. The actions include a peak consumption value reset of the utility meter.Type: ApplicationFiled: November 16, 2006Publication date: May 22, 2008Inventors: Arthur John Klaus, Timothy Clark Winter, Minakshisundaran Balasubramanian Anand
-
Patent number: 6720658Abstract: In the present invention, the bonding pad is formed in a lattice-like shape. Directly underneath the passivation layer, the etching stopper layer is provided. An opening is made through the passivation layer and the etching stopper layer so as to expose the bonding pad. The cavity sections of the lattice-like shape of the bonding pad are filled with the insulating layer. The bonding wire is connected to the lattice-shaped bonding pad. With this structure, the bonding error of the device manufactured by the damascening process can be avoided.Type: GrantFiled: October 30, 2002Date of Patent: April 13, 2004Assignee: Kabushiki Kaisha ToshibaInventor: Minakshisundaran Balasubramanian Anand
-
Publication number: 20030062625Abstract: In the present invention, the bonding pad is formed in a lattice-like shape. Directly underneath the passivation layer, the etching stopper layer is provided. An opening is made through the passivation layer and the etching stopper layer so as to expose the bonding pad. The cavity sections of the lattice-like shape of the bonding pad are filled with the insulating layer. The bonding wire is connected to the lattice-shaped bonding pad. With this structure, the bonding error of the device manufactured by the damascening process can be avoided.Type: ApplicationFiled: October 30, 2002Publication date: April 3, 2003Applicant: Kabushiki Kaisha ToshibaInventor: Minakshisundaran Balasubramanian Anand
-
Patent number: 6500748Abstract: In the present invention, the bonding pad is formed in a lattice-like shape. Directly underneath the passivation layer, the etching stopper layer is provided. An opening is made through the passivation layer and the etching stopper layer so as to expose the bonding pad. The cavity sections of the lattice-like shape of the bonding pad are filled with the insulating layer. The bonding wire is connected to the lattice-shaped bonding pad. With this structure, the bonding error of the device manufactured by the damascening process can be avoided.Type: GrantFiled: October 11, 2001Date of Patent: December 31, 2002Assignee: Kabushiki Kaisha ToshibaInventor: Minakshisundaran Balasubramanian Anand
-
Patent number: 6368951Abstract: A semiconductor device manufacturing method comprises a step of forming a trench to a first insulation film formed on a semiconductor substrate, and forming a lower level wiring in the trench, a step of forming at least one conductive layer on the semiconductor substrate to coat the lower level wiring, a step of forming at least one thin film layer on the conductive layer, a step of forming a hard mask by patterning the thin film, a step of etching the conductive layer by using the hard mask as an etching mask, and forming a conductive pillar-shaped structure, whose upper surface is covered with the hard mask, on the lower level wiring, a step of forming a second insulation film on the semiconductor substrate so that the pillar-shaped structure is buried, a step of forming a wiring trench in which at least the hard mask is exposed, and a step of burying a conductor into the wiring trench after the hard mask is removed, and forming an upper level wiring in the wiring trench.Type: GrantFiled: July 13, 2001Date of Patent: April 9, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Kazuyuki Higashi, Noriaki Matsunaga, Akihiro Kajita, Tetsuo Matsuda, Tadashi Iijima, Hisashi Kaneko, Hideki Shibata, Naofumi Nakamura, Minakshisundaran Balasubramanian Anand, Tadashi Matsuno, Katsuya Okumura
-
Patent number: 6362528Abstract: In the present invention, the bonding pad is formed in a lattice-like shape. Directly underneath the passivation layer, the etching stopper layer is provided. An opening is made through the passivation layer and the etching stopper layer so as to expose the bonding pad. The cavity sections of the lattice-like shape of the bonding pad are filled with the insulating layer. The bonding wire is connected to the lattice-shaped bonding pad. With this structure, the bonding error of the device manufactured by the damascening process can be avoided.Type: GrantFiled: August 20, 1997Date of Patent: March 26, 2002Assignee: Kabushiki Kaisha ToshibaInventor: Minakshisundaran Balasubramanian Anand
-
Publication number: 20020020918Abstract: In the present invention, the bonding pad is formed in a lattice-like shape. Directly underneath the passivation layer, the etching stopper layer is provided. An opening is made through the passivation layer and the etching stopper layer so as to expose the bonding pad. The cavity sections of the lattice-like shape of the bonding pad are filled with the insulating layer. The bonding wire is connected to the lattice-shaped bonding pad. With this structure, the bonding error of the device manufactured by the damascening process can be avoided.Type: ApplicationFiled: October 11, 2001Publication date: February 21, 2002Applicant: Kabushiki Kaisha ToshibaInventor: Minakshisundaran Balasubramanian Anand
-
Publication number: 20010038147Abstract: A semiconductor device manufacturing method comprises a step of forming a trench to a first insulation film formed on a semiconductor substrate, and forming a lower level wiring in the trench, a step of forming at least one conductive layer on the semiconductor substrate to coat the lower level wiring, a step of forming at least one thin film layer on the conductive layer, a step of forming a hard mask by patterning the thin film, a step of etching the conductive layer by using the hard mask as an etching mask, and forming a conductive pillar-shaped structure, whose upper surface is covered with the hard mask, on the lower level wiring, a step of forming a second insulation film on the semiconductor substrate so that the pillar-shaped structure is buried, a step of forming a wiring trench in which at least the hard mask is exposed, and a step of burying a conductor into the wiring trench after the hard mask is removed, and forming an upper level wiring in the wiring trench.Type: ApplicationFiled: July 13, 2001Publication date: November 8, 2001Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kazuyuki Higashi, Noriaki Matsunaga, Akihiro Kajita, Tetsuo Matsuda, Tadashi Iijima, Hisashi Kaneko, Hideki Shibata, Naofumi Nakamura, Minakshisundaran Balasubramanian Anand, Tadashi Matsuno, Katsuya Okumura
-
Patent number: 6307265Abstract: Wires are provided on an insulating layer, reaching the source region and drain region of a MOS transistor. Each wire is composed of a conductor and a barrier layer covering the surfaces of the conductor. An insulating layer is mounted on the wires, an insulating layer on the insulating layer, and an insulating layer on the insulating layer. Cavities are provided among the wires. The cavities are filled with air or a mixture gas of oxygen and carbon dioxide. Wires are provided on the insulating layer. Cavities are provided among the wires. These cavities are filled with air or a mixture gas of oxygen and carbon dioxide.Type: GrantFiled: August 15, 1996Date of Patent: October 23, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Minakshisundaran Balasubramanian Anand, Hideki Shibata, Masaki Yamada
-
Patent number: 6306753Abstract: Wires are provided on an insulating layer, reaching the source region and drain region of a MOS transistor. Each wire is composed of a conductor and a barrier layer covering the surfaces of the conductor. An insulating layer is mounted on the wires, an insulating layer on the insulating layer, and an insulating layer on the insulating layer. Cavities are provided among the wires. The cavities are filled with air or a mixture gas of oxygen and carbon dioxide. Wires are provided on the insulating layer. Cavities are provided among the wires. These cavities are filled with air or a mixture gas of oxygen and carbon dioxide.Type: GrantFiled: March 14, 2000Date of Patent: October 23, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Minakshisundaran Balasubramanian Anand, Hideki Shibata, Masaki Yamada
-
Patent number: 6291891Abstract: A semiconductor device manufacturing method comprises a step of forming a trench to a first insulation film formed on a semiconductor substrate, and forming a lower level wiring in the trench, a step of forming at least one conductive layer on the semiconductor substrate to coat the lower level wiring, a step of forming at least one thin film layer on the conductive layer, a step of forming a hard mask by patterning the thin film, a step of etching the conductive layer by using the hard mask as an etching mask, and forming a conductive pillar-shaped structure, whose upper surface is covered with the hard mask, on the lower level wiring, a step of forming a second insulation film on the semiconductor substrate so that the pillar-shaped structure is buried, a step of forming a wiring trench in which at least the hard mask is exposed, and a step of burying a conductor into the wiring trench after the hard mask is removed, and forming an upper level wiring in the wiring trench.Type: GrantFiled: January 12, 1999Date of Patent: September 18, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Kazuyuki Higashi, Noriaki Matsunaga, Akihiro Kajita, Tetsuo Matsuda, Tadashi Iijima, Hisashi Kaneko, Hideki Shibata, Naofumi Nakamura, Minakshisundaran Balasubramanian Anand, Tadashi Matsuno, Katsuya Okumura