Patents by Inventor Baltazar Canete

Baltazar Canete has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10764989
    Abstract: An integrated circuit package having excellent heat dissipation is described. An integrated circuit die is attached to a substrate and the substrate is mounted on a printed circuit board (PCB) wherein there is a gap between a surface of the die facing the PCB and the PCB. A thermal enhanced layer is formed within the gap wherein heat travels from the die through the thermal enhanced layer to the PCB.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: September 1, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Tung Ching Lui, Baltazar Canete, Rajesh Aiyandra
  • Patent number: 10410996
    Abstract: An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: September 10, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Melvin Martin, Baltazar Canete, Jr., Macario Campos, Rajesh Aiyandra
  • Publication number: 20190259689
    Abstract: A method of fabricating an integrated circuit package having improved heat dissipation is described. A re-routable clip is provided having a central portion and a plurality of leads surrounding the central portion. A die is attached to an underside of the central portion of the re-routable clip. The die and the leads of the re-routable clip are attached to a substrate. The die and the leads are encapsulated with a mold compound wherein a top surface of the central portion of the re-routable clip is exposed by the mold compound. The substrate is connected to a printed circuit board wherein thermal pathways are formed 1) from the die downward to the substrate to the printed circuit board and 2) from the die upward to the re-routable clip and then downward through the leads to the substrate and to the printed circuit board.
    Type: Application
    Filed: February 19, 2018
    Publication date: August 22, 2019
    Inventors: Tung Ching Lui, Baltazar Canete, Melvin Martin, Rajesh Subraya Aiyandra
  • Patent number: 10332864
    Abstract: An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: June 25, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Melvin Martin, Baltazar Canete, Jr., Macario Campos, Rajesh Aiyandra
  • Publication number: 20180158804
    Abstract: An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
    Type: Application
    Filed: December 2, 2016
    Publication date: June 7, 2018
    Inventors: Melvin Martin, Baltazar Canete, JR., Macario Campos, Rajesh Aiyandra
  • Publication number: 20180025965
    Abstract: A quad flat no lead package is provided comprising at least one first integrated circuit die embedded in a recess in a die paddle of a metal leadframe and a second integrated circuit chip die attached to the at least one first integrated circuit die wherein the first and second integrated circuit dies are electrically connected to each other and wherein the second integrated circuit die is connected to leads of the leadframe through copper pillars.
    Type: Application
    Filed: July 19, 2016
    Publication date: January 25, 2018
    Inventors: Baltazar Canete, JR., Melvin Martin, Ian Kent, Jesus Mennen Belonio, JR., Rajesh Subraya Aiyandra
  • Publication number: 20140355215
    Abstract: An electronic package is fabricated wherein a substrate is provided having three or more layers. A heat slug is embedded completely within the substrate. A die is attached above the substrate. Thermal paths to the heat slug are linked through the ground signal interconnects (traces, vias and planes).
    Type: Application
    Filed: June 3, 2013
    Publication date: December 4, 2014
    Inventors: Baltazar Canete, Melvin Martin, Ian Kent