Abstract: A resist underlayer film forming composition for EUV lithography, comprising: as a silane, a hydrolyzable silane, a hydrolyzate of the hydrolyzable silane, a hydrolysis condensate of the hydrolyzable silane, or a mixture of any of the hydrolyzable silane, the hydrolyzate, and the hydrolysis condensate, wherein the hydrolyzable silane includes a combination of tetramethoxysilane, an alkyltrimethoxysilane, and an aryltrialkoxysilane, and the aryltrialkoxysilane is represented by formula (1): (R2)n2—R1—(CH2)n1—Si(X)3??Formula (1) In formula (1), R1 is an aromatic ring consisting of a benzene ring or a naphthalene ring or a ring including an isocyanuric acid structure, R2 is a substituent replacing a hydrogen atom on the aromatic ring and is a halogen atom or a C1-10 alkoxy group, and X is a C1-10 alkoxy group, a C2-10 acyloxy group, or a halogen group.

Abstract: A resist underlayer film forming composition for EUV lithography, comprising: as a silane, a hydrolyzable silane, a hydrolyzate of the hydrolyzable silane, a hydrolysis condensate of the hydrolyzable silane, or a mixture of any of the hydrolyzable silane, the hydrolyzate, and the hydrolysis condensate, wherein the hydrolyzable silane includes a combination of tetramethoxysilane, an alkyltrimethoxysilane, and an aryltrialkoxysilane, and the aryltrialkoxysilane is represented by formula (1): (R2)n2—R1—(CH2)n1—Si(X)3??Formula (1) In formula (1), R1 is an aromatic ring consisting of a benzene ring or a naphthalene ring or a ring including an isocyanuric acid structure, R2 is a substituent replacing a hydrogen atom on the aromatic ring and is a halogen atom or a C1-10 alkoxy group, and X is a C1-10 alkoxy group, a C2-10 acyloxy group, or a halogen group.

Abstract: A semiconductor device having a specific contact angle for immersion lithography is disclosed. The semiconductor device includes a substrate and a top layer disposed on the substrate. The top layer used in an immersion lithography process includes a composition such that a fluid droplet that occurs during the immersion lithographic process and is not part of an exposure fluid puddle, will have a contact angle between about 40° and about 80° with a surface of the top layer.

Abstract: A method of determining temperatures at localized regions of a substrate during processing of the substrate in a photolithography process includes the following steps: independently illuminating a photoresist layer including a photoresist pattern at a plurality of locations on the substrate with a light source, so that light is diffracted off the plurality of locations of the photoresist pattern; measuring the diffracted light from the plurality of locations to determine measured diffracted values associated with respective locations from the plurality of locations; and comparing the measured diffracted values against a library to determine a pre-illumination process temperature of the photoresist layer at the plurality of locations.

Abstract: A method comprises forming a BARC layer on a substrate, treating the BARC layer to make its surface hydrophilic, forming a photoresist layer on the treated BARC layer, exposing the photoresist layer to a predetermined pattern, and developing the photoresist layer to form patterned photoresist.

Abstract: A method for forming a dual damascene structure in a semiconductor device manufacturing process where via plugs which may include a thickness portion of a plug filling material overlying the process surface is formed by diffusing an acid into a plug filling material layer followed by reacting the acid with the plug filling material layer to form a soluble portion which is then removed using a solvent. A remaining portion of the plug filling material is cured and a BARC layer may be formed over the process surface prior to patterning trenches in an overlying resist layer and forming a dual damascene structure.

Abstract: An anti-reflective coating layer for the manufacturing of semiconductor devices is disclosed. In one example, a partial semiconductor device includes a substrate; a bottom anti-reflective coating (BARC) layer over the substrate, and the BARC layer is transformed from being hydrophobic to being hydrophilic during a lithography process; and a photoresist layer over the BARC layer.

Abstract: A method for forming a dual damascene structure in a semiconductor device manufacturing process where via plugs which may include a thickness portion of a plug filling material overlying the process surface is formed by diffusing an acid into a plug filling material layer followed by reacting the acid with the plug filling material layer to form a soluble portion which is then removed using a solvent. A remaining portion of the plug filling material is cured and a BARC layer may be formed over the process surface prior to patterning trenches in an overlying resist layer and forming a dual damascene structure.

Abstract: A method of determining temperatures at localized regions of a substrate during processing of the substrate in a photolithography process includes the following steps: independently illuminating a photoresist layer including a photoresist pattern at a plurality of locations on the substrate with a light source, so that light is diffracted off the plurality of locations of the photoresist pattern; measuring the diffracted light from the plurality of locations to determine measured diffracted values associated with respective locations from the plurality of locations; and comparing the measured diffracted values against a library to determine a pre-illumination process temperature of the photoresist layer at the plurality of locations.

Abstract: A method for creating a hole in a semiconductor wafer includes forming a hard mask over a dielectric layer, the hard mask including a solid portion and a first opening. A patterning layer is provided over the hard mask, the patterning layer including second and third openings. The second opening of the patterning layer aligns with the first opening of the hard mask and the third opening of the patterning layer aligns with the solid portion of the hard mask. The hole is created in the dielectric layer using the second opening of the patterning layer and the first opening of the hard mask.

Abstract: A method of determining temperatures at localized regions of a substrate during processing of the substrate in a photolithography process includes the following steps: independently illuminating a photoresist layer including a photoresist pattern at a plurality of locations on the substrate with a light source, so that light is diffracted off the plurality of locations of the photoresist pattern; measuring the diffracted light from the plurality of locations to determine measured diffracted values associated with respective locations from the plurality of locations; and comparing the measured diffracted values against a library to determine a pre-illumination process temperature of the photoresist layer at the plurality of locations.

Abstract: Provided is a method for manufacturing a semiconductor device. In one example, the method includes forming a negative photoresist layer over an underlying layer, where the negative photoresist layer is soluble by a developer when formed. The negative photoresist layer is patterned using a chromium-less mask. The patterning alters at least a portion of the negative photoresist layer so that the altered portion is not soluble by the developer. The patterned negative photoresist layer is developed to form at least one opening in the negative photoresist layer by removing an unaltered portion of the negative photoresist layer. The negative photoresist layer is then heated, which causes the negative photoresist layer to flow.

Abstract: A method for performing immersion lithography on a semiconductor wafer is disclosed. The method includes positioning the semiconductor wafer beneath a lens and applying a fluid between a top surface of the semiconductor wafer and the lens. An additive can be provided to the top surface so that any droplet of the fluid that forms on the top surface of the semiconductor wafer will have a contact angle between about 40° and about 80°.

Abstract: The present disclosure relates generally to the manufacturing of semiconductor devices, and more particularly to a dual-damascene process for the manufacturing of semiconductor devices. A method of forming a dual-damascene structure includes forming a via hole and filling the via hole at least partially with a first plug material. A portion of the first plug material is removed and the remaining via hole is filled with a second plug material. A portion of the second plug material can also be removed.

Abstract: A method for performing immersion lithography on a semiconductor wafer is disclosed. The method includes positioning the semiconductor wafer beneath a lens and applying a fluid between a top surface of the semiconductor wafer and the lens. An additive can be provided to the top surface so that any droplet of the fluid that forms on the top surface of the semiconductor wafer will have a contact angle between about 40° and about 80°.

Abstract: An anti-reflective coating layer for the manufacturing of semiconductor devices is disclosed. In one example, a partial semiconductor device includes a substrate; a bottom anti-reflective coating (BARC) layer over the substrate, and the BARC layer is transformed from being hydrophobic to being hydrophilic during a lithography process; and a photoresist layer over the BARC layer.

Abstract: A method for performing immersion lithography on a semiconductor wafer is disclosed. The method includes positioning the semiconductor wafer beneath a lens and applying a fluid between a top surface of the semiconductor wafer and the lens. An additive can be provided to the top surface so that any droplet of the fluid that forms on the top surface of the semiconductor wafer will have a contact angle between about 40° and about 80°.

Abstract: A method comprises forming a BARC layer on a substrate, treating the BARC layer to make its surface hydrophilic, forming a photoresist layer on the treated BARC layer, exposing the photoresist layer to a predetermined pattern, and developing the photoresist layer to form patterned photoresist.

Abstract: A method for creating a hole in a semiconductor wafer includes forming a hard mask over a dielectric layer, the hard mask including a solid portion and a first opening. A patterning layer is provided over the hard mask, the patterning layer including second and third openings. The second opening of the patterning layer aligns with the first opening of the hard mask and the third opening of the patterning layer aligns with the solid portion of the hard mask. The hole is created in the dielectric layer using the second opening of the patterning layer and the first opening of the hard mask.

Abstract: A method for transferring a pattern from a mask to a substrate (or wafer), comprises dividing a mask generation data file into a plurality of segments. The segments include a main pattern area and a stitching area. Each stitching area contains a respective common pattern. An image of an illuminated portion of the main pattern area is formed. Connection ends of the segments in a substrate area (or wafer area) are illuminated with an illumination beam. An image of the illuminated portion of the main pattern area is formed, and a halftone gray level dosage distribution is produced in the substrate area (or wafer area) corresponding to the common pattern. The common patterns of adjacent segments substantially overlap in the substrate area (or wafer area).