Abstract: A semiconductor switching device includes a plurality of adjacent heterojunction-gate static-induction transistor (SIT) unit cells connected in parallel in a monocrystalline silicon carbide substrate having first and second opposing faces, a relatively highly doped silicon carbide drain region adjacent the first face and a relatively highly doped silicon carbide source region adjacent the second face. A relatively lightly doped drift region is also provided in the substrate and extends between the drain region and source region. A plurality of trenches are also provided in the substrate so that sidewalls of the trenches extend adjacent the drift region. Each trench preferably contains a relatively highly doped second conductivity type nonmonocrystalline silicon gate region comprised of a material selected from the group consisting of polycrystalline silicon or amorphous silicon. These gate regions form P-N heterojunctions with the drift region at the sidewalls and bottoms of the trenches.