Patents by Inventor Baolin XIA

Baolin XIA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10824578
    Abstract: Provided is a bitwise writing apparatus for a SOC system. The apparatus includes a slave device interface module, a decoding module and a master device interface module. The slave device interface module is configured to receive a write request sent by a master device interface of a bus controller and send the write request to the decoding module. The decoding module is configured to receive the write request sent by the slave device interface module, decode the write request and send valid information after the decoding to the master device interface module. The master device interface module is configured to receive the valid information sent by the decoding module, read data in a destination address, perform a bitwise operation for the read data to obtain new data, send a write request to a slave device interface of the bus controller and write the obtained new data into a peripheral register corresponding to the destination address.
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: November 3, 2020
    Assignee: C-SKY Microsystems Co., Ltd.
    Inventors: Aiyong Ma, Bo Sun, Baolin Xia, Xianshao Chen
  • Publication number: 20190384938
    Abstract: A storage apparatus and method for address scrambling. The apparatus includes: a key-generating module (11) configured to generate a random key; a non-volatile key memory (12) configured to store the random key generated by the key-generating module (11); a key-reading module (13) configured to automatically read the random key stored in the non-volatile key memory (12) and store the random key; a memory control module (15) configured to output, to an address scrambling module (14), an unscrambled address in generated sequential control logic for reading or writing an on-chip memory; and the address scrambling module (14) connected to the memory control module (15), the key-reading module (13), and the memory (16), respectively, and configured to perform, according to the random key read by the key-reading module (13), scrambling processing on the unscrambled address outputted by the memory control module (15) to form a scrambled address, and send the scrambled address to the memory (16).
    Type: Application
    Filed: December 6, 2018
    Publication date: December 19, 2019
    Inventors: Yucan GU, Baolin XIA, Youfei WU, Haiming GU
  • Publication number: 20190370200
    Abstract: Provided is a bitwise writing apparatus for a SOC system. The apparatus includes a slave device interface module, a decoding module and a master device interface module. The slave device interface module is configured to receive a write request sent by a master device interface of a bus controller and send the write request to the decoding module. The decoding module is configured to receive the write request sent by the slave device interface module, decode the write request and send valid information after the decoding to the master device interface module. The master device interface module is configured to receive the valid information sent by the decoding module, read data in a destination address, perform a bitwise operation for the read data to obtain new data, send a write request to a slave device interface of the bus controller and write the obtained new data into a peripheral register corresponding to the destination address.
    Type: Application
    Filed: December 25, 2018
    Publication date: December 5, 2019
    Inventors: Aiyong MA, Bo SUN, Baolin XIA, Xianshao CHEN