Abstract: The display panel comprises: a plurality of pixels arranged in an array. Each pixel comprises a plurality of subpixels. The plurality of pixels arranged in an array comprise: a plurality of pixel rows. Each pixel row comprises a plurality of subpixels arranged in a first direction. The plurality of pixel rows extend in a second direction. The first direction intersects with the second direction. The display panel comprises: a first array substrate and a first opposing substrate arranged opposite to each other, and a first liquid crystal layer located between the first array substrate and the first opposing substrate. The first array substrate comprises: a plurality of first driving transistors arranged in an array. At least one pixel is arranged between two adjacent first driving transistors in the first direction. The first opposing substrate comprises: a plurality of light shielding portions in one-to-one correspondence to the first driving transistors.

Abstract: A display substrate, a method for manufacturing a display substrate and a display device are provided. The display substrate has a display area and a bonding area. The display substrate includes a base, a first conductive layer, a light shielding layer, and bonding pads. The first conductive layer is on the base and in the display area, and the first conductive layer includes gate lines; the light shielding layer is on a side of the first conductive layer proximal to the base, and an orthographic projection of the light shielding layer on the base at least covers orthographic projections of the gate lines on the base; the bonding pads are on the base at intervals and in the bonding area, orthographic projections of at least a portion of the bonding pads on the base are not overlapped with the orthographic projection of the light shielding layer on the base.

Abstract: Common voltage compensation device for display panel is provided. The common voltage compensation device is on a first side of a display panel, and a common electrode line includes a near-end area, a far-end area, and a middle-end area; the common voltage compensation device includes a voltage feedback line, a common voltage compensation circuit, and voltage compensation lines, the voltage feedback line is connected to a feedback point at the middle-end area and is configured to detect a common voltage on the common electrode line; the common voltage compensation circuit is configured to obtain a compensation voltage according to the detected common voltage; and the voltage compensation lines are respectively connected to a first compensation point at the near-end area, a second compensation point at the middle-end area, and a third compensation point at the far-end area, and configured to transmit the compensation voltage to the common electrode line.

Abstract: A display substrate, a display panel and a display apparatus are provided. The display substrate includes: a base substrate; signal lines disposed at a side of the base substrate and arranged in a first direction, and an orthographic projection of each signal line on the base substrate is in a shape of a bent line; and a plurality of common electrode strips, where the plurality of common electrode strips and the signal lines are disposed at the same side of the base substrate and are insulated from each other. Each common electrode strip includes a plurality of common electrode blocks arranged in sequence in the first direction, a first slit is provided between adjacent common electrode blocks, and orthographic projections of at least part of the signal lines on the base substrate are located within orthographic projections of the first slits on the base substrate.

Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel comprises: a base substrate having multiple rows and multiple columns of sub-pixels; and a pixel electrode layer located on the base substrate, the pixel electrode layer comprising a plurality of pixel electrodes arranged apart from each other, and one sub-pixel comprising one pixel electrode, wherein the pixel electrode comprises: a first electrode strip and comb structures respectively connected to both sides of the first electrode strip, each comb structure consisting of a plurality of second electrode strips and a plurality of slits arranged alternately.

Abstract: A display panel and a display device are disclosed. The display panel includes: first pixels, second pixels and first pixel groups; each first pixel group includes a third pixel, and each first pixel includes a first sub-pixel opening region; each second pixel includes a second sub-pixel opening region; each third pixel includes a third sub-pixel opening region: a first ratio of an area of the first sub-pixel opening region to an area of a sub-pixel corresponding to the first sub-pixel opening region in a display region is less than a second ratio of an area of the second sub-pixel opening region to an area of a sub-pixel in the second pixel; a third ratio of an area of the third sub-pixel opening region to an area of a sub-pixel in the third pixel is not less than the first ratio; and the third ratio is less than the second ratio.

Abstract: Embodiments of the present disclosure provide a display panel and a display apparatus. The display panel includes: a display region and at least one non-display region adjacent to the display region; a boundary between the at least one non-display region and the display region has a curve part; the display panel includes pixels, including first pixels and second pixels; the pixels include sub-pixels; each first pixel includes: at least one first sub-pixel opening region corresponding to at least one sub-pixel and located in the display region, at least one first sub-pixel opening region in each first pixel is adjacent to the curve part, and a shape of at least part of the at least one first sub-pixel opening region adjacent to the curve part is non-rectangular; and each second pixel is located in the display region, each second pixel includes a second sub-pixel opening region corresponding to a sub-pixel.

Abstract: The display panel comprises: a plurality of pixels arranged in an array. Each pixel comprises a plurality of subpixels. The plurality of pixels arranged in an array comprise: a plurality of pixel rows. Each pixel row comprises a plurality of subpixels arranged in a first direction. The plurality of pixel rows extend in a second direction. The first direction intersects with the second direction. The display panel comprises: a first array substrate and a first opposing substrate arranged opposite to each other, and a first liquid crystal layer located between the first array substrate and the first opposing substrate. The first array substrate comprises: a plurality of first driving transistors arranged in an array. At least one pixel is arranged between two adjacent first driving transistors in the first direction. The first opposing substrate comprises: a plurality of light shielding portions in one-to-one correspondence to the first driving transistors.

Abstract: The present disclosure provides a display device. The display device comprises: a display panel, comprising a plurality of sub-pixels arranged in an array, the colors of any two adjacent sub-pixels being different; and a moiré suppression layer, located on the light emitting side of the display panel.

Abstract: The present disclosure discloses a display panel and a display device. The display panel includes a base substrate, and the base substrate includes a plurality of sub-pixels and a plurality of signal routing wires; where each of the plurality of sub-pixels includes an effective light-emitting region; an orthographic projection of the effective light-emitting region on the base substrate and an orthographic projection of one of the plurality of signal routing wires on the base substrate have a first overlapping region; and the first overlapping region is in a non-linear shape.

Abstract: An array substrate, a display device, and a method for repairing a broken wire of an array substrate are disclosed. The array substrate includes a substrate, a plurality of sub-pixel units on the substrate, and a wire and a first conductive light-blocking pattern between two adjacent sub-pixel units of the plurality of sub-pixel units. The first conductive light-blocking pattern is electrically insulated from the wire, and the first conductive light-blocking pattern includes two first regions. Orthographic projections of the two first regions on the substrate overlap with an orthographic projection of the wire on the substrate.

Abstract: A display substrate, a method for manufacturing a display substrate and a display device are provided. The display substrate has a display area and a bonding area. The display substrate includes a base, a first conductive layer, a light shielding layer, and bonding pads. The first conductive layer is on the base and in the display area, and the first conductive layer includes gate lines; the light shielding layer is on a side of the first conductive layer proximal to the base, and an orthographic projection of the light shielding layer on the base at least covers orthographic projections of the gate lines on the base; the bonding pads are on the base at intervals and in the bonding area, orthographic projections of at least a portion of the bonding pads on the base are not overlapped with the orthographic projection of the light shielding layer on the base.

Abstract: An array substrate, a display panel, a display device, and a manufacturing method for an array substrate are provided. The array substrate includes a pixel unit group which includes a first pixel and a second pixel; the first pixel includes a first pixel electrode, a first switching element, and a first connection portion extending and protruding from the first pixel electrode; the second pixel includes a second pixel electrode, a second switching element, and a second connection portion extending and protruding from the second pixel electrode; the first pixel electrode and the first switching element are electrically connected to each other via the first connection portion; the second pixel electrode and the second switching element are electrically connected to each other via the second connection portion; and an extension length of the first connection portion is not equal to an extension length of the second connection portion.

Abstract: A method of preparing a graphene circuit pattern, a substrate and an electronic product are disclosed. The method of preparing a graphene circuit pattern includes: immersing a metal circuit pattern in a graphene oxide solution to cause a redox reaction between the metal circuit pattern and graphene oxide, thereby forming the graphene circuit pattern. The graphene circuit pattern may be directly formed at a location of the metal circuit pattern, and is simple in production process, low in cost, and suitable for mass production.

Abstract: The present disclosure discloses a display panel and a display device. The display panel includes a base substrate, and the base substrate includes a plurality of sub-pixels and a plurality of signal routing wires; where each of the plurality of sub-pixels includes an effective light-emitting region; an orthographic projection of the effective light-emitting region on the base substrate and an orthographic projection of one of the plurality of signal routing wires on the base substrate have a first overlapping region; and the first overlapping region is in a non-linear shape.

Abstract: A start signal generation circuit, a driving method and a display device are provided. The start signal generation circuit includes: a pull-down node control sub-circuit; a pull-up control node control sub-circuit, configured to control a potential of the pull-up control node under the control of voltage signals from a first clock signal input terminal, a second clock signal input terminal, and the 2nth clock signal input terminal; a pull-up node control sub-circuit; a storage sub-circuit, connected between the pull-up node PU and a start signal output terminal; and a start signal output sub-circuit, where n is an integer larger than 1, and smaller than or equal to N, N is an integer larger than 1.

Abstract: An array substrate, a display panel, a display device, and a manufacturing method for an array substrate are provided. The array substrate includes a pixel unit group which includes a first pixel and a second pixel; the first pixel includes a first pixel electrode, a first switching element, and a first connection portion extending and protruding from the first pixel electrode; the second pixel includes a second pixel electrode, a second switching element, and a second connection portion extending and protruding from the second pixel electrode; the first pixel electrode and the first switching element are electrically connected to each other via the first connection portion; the second pixel electrode and the second switching element are electrically connected to each other via the second connection portion; and an extension length of the first connection portion is not equal to an extension length of the second connection portion.

Abstract: The disclosure relates to a display panel. The display panel may include a first substrate, a second substrate opposite the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first electrode on a side of the first substrate facing the liquid crystal layer, a second electrode between the liquid crystal layer and the first electrode, the second electrode being insulated from the first electrode, and an anti-peeping electrode on a side of the second substrate facing the liquid crystal layer.

Abstract: A start signal generation circuit, a driving method and a display device are provided. The start signal generation circuit includes: a pull-down node control sub-circuit; a pull-up control node control sub-circuit, configured to control a potential of the pull-up control node under the control of voltage signals from a first clock signal input terminal, a second clock signal input terminal, and the 2nth clock signal input terminal; a pull-up node control sub-circuit; a storage sub-circuit, connected between the pull-up node PU and a start signal output terminal; and a start signal output sub-circuit, where n is an integer larger than 1, and smaller than or equal to N, N is an integer larger than 1.

Abstract: A method of preparing a graphene circuit pattern, a substrate and an electronic product are disclosed. The method of preparing a graphene circuit pattern includes: immersing a metal circuit pattern in a graphene oxide solution to cause a redox reaction between the metal circuit pattern and graphite oxide, thereby forming the graphene circuit pattern. The graphene circuit pattern may be directly formed at a location of the metal circuit pattern, and is simple in production process, low in cost, and suitable for mass production.