Abstract: The display substrate comprises a display area and a peripheral area surrounding the display area. The display substrate comprises: a substrate, a first and second conductive layers located on the substrate and sequentially arranged in the direction away from the substrate, and a first organic insulating layer located between the first and second conductive layers. The first conductive layer comprises a plurality of first metal wires extending in a first direction. The second conductive layer comprises a plurality of second metal wires extending in the first direction. In the peripheral area, the first organic insulating layer is divided, and the edge of the first organic insulating layer extends in a second direction and forms a first step. The second direction intersects with the first direction. The first step comprises at least one protruding structure and at least one recess structure located between the adjacent second metal wires.

Abstract: The present disclosure provides a display panel and a display apparatus, the display panel includes an base substrate and multiple pixel unit groups disposed on the base substrate and arranged in an array, each pixel unit group including a first pixel unit and a second pixel unit disposed on the base substrate; the first pixel unit includes a pixel driving circuit and a first light-emitting device electrically connected with the pixel driving circuit, and the second pixel unit includes a second light-emitting device; for the pixel unit groups located in a same row, each pixel driving circuit and a second electrode of each second light-emitting device are connected to a same gate line; for the pixel unit groups located in a same column, each pixel driving circuit is connected to a same data line, and a first electrode of each second light-emitting device is connected to a same data line.

Abstract: The present application discloses a thin film transistor. The thin film transistor includes a base substrate; an active layer; an etch stop layer on a side of the active layer distal to the base substrate; and a source electrode and a drain electrode on a side of the etch stop layer distal to the active layer. The active layer includes a channel region, a source electrode contact region, and a drain electrode contact region. An orthographic projection of the etch stop layer on the base substrate surrounds an orthographic projection of the drain electrode contact region on the base substrate. An orthographic projection of the source electrode contact region on the base substrate at least partially peripherally surrounding the orthographic projection of the etch stop layer on the base substrate.

Abstract: The present application discloses a thin film transistor. The thin film transistor includes a base substrate; an active layer; an etch stop layer on a side of the active layer distal to the base substrate; and a source electrode and a drain electrode on a side of the etch stop layer distal to the active layer. The active layer includes a channel region, a source electrode contact region, and a drain electrode contact region. An orthographic projection of the etch stop layer on the base substrate surrounds an orthographic projection of the drain electrode contact region on the base substrate. An orthographic projection of the source electrode contact region on the base substrate at least partially peripherally surrounding the orthographic projection of the etch stop layer on the base substrate.