Abstract: The present invention provides a method for extracting a neuroimaging biomarker based on an interpretable ensemble three-dimensional convolutional neural network (3DCNN) to address limitations in the prior art. The present invention derives a novel neuroimaging biomarker P-score from prediction results obtained by an ensemble three-dimensional convolutional neural network model. The solution can help researchers to conduct studies on longitudinal trajectory changes of structural magnetic resonance imaging (sMRI) during the progression of Alzheimer's disease, and analyze an association of the longitudinal trajectory changes with neurodegenerative changes of Alzheimer's disease subjects. The extracted neuroimaging biomarker can provide a basis for predicting a sequence of intervention of brain regions in the neurodegenerative changes of Alzheimer's disease patients and upcoming clinical symptoms.

Abstract: A processor, a signal adjustment method, and a computer system including the processor are provided, pertaining to the field of computer technologies. The processor includes a memory controller. The memory controller includes a memory physical interface and a first processor core, and the first processor core is connected to the memory physical interface. After the computer system is started and during a running process of the computer system, the first processor core is configured to adjust a timing relationship between a target signal of the memory physical interface and a synchronization signal of the target signal. According to this application, timing alignment can be ensured between the target signal and the synchronization signal, thereby improving correctness of sampling performed on the target signal.

Abstract: A memory initialization apparatus and method, and a computer system are provided. The memory initialization apparatus includes a first processor core and a memory controller that includes at least one second processor core. In a memory initialization process, the first processor core may invoke the second processor core to perform memory initialization. This helps to shorten memory initialization duration.