Patents by Inventor Bar Shapira
Bar Shapira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240154712Abstract: A system for maintaining a Precision Time Protocol (PTP) hardware clock, the system being operative in conjunction with a network device which is external to the system, the system comprising a controller to receive information characterizing a network peer oscillator frequency, wherein the information was extracted from an RX symbol rate, and to adjust the PTP Hardware Clock's frequency responsive to the information characterizing the network peer oscillator frequency.Type: ApplicationFiled: January 18, 2024Publication date: May 9, 2024Inventors: Bar Shapira, Ariel Almog, Dotan David Levi, Natan Manevich, Thomas Kernen, Liron Mula
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Patent number: 11917045Abstract: In one embodiment, a communication system includes network devices, each comprising a network interface to receive at least one data stream, a given network device being configured to recover a remote clock from the at least one data stream received by the given network device, a frequency synthesizer to generate a clock signal and output the clock signal to each of the network devices, wherein the given network device is configured to find a clock frequency differential between the clock signal and the recovered remote clock, and provide a control signal to the frequency synthesizer responsively to the clock frequency differential, the control signal causes the frequency synthesizer to adjust the clock signal so as to iteratively reduce an absolute value of the clock frequency differential between the clock signal and the recovered remote clock.Type: GrantFiled: July 24, 2022Date of Patent: February 27, 2024Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Dotan David Levi, Arnon Sattinger, Natan Manevich, Wojciech Wasko, Ariel Almog, Bar Or Shapira
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Publication number: 20240056400Abstract: Systems, methods, and devices that perform computing operations are provided. In one example, a system includes a least one node, the at least one node having one or more processors, each having associated memory, a clock, a scheduler, the scheduler monitoring one or more of rates, rates of lanes, rates at which packets are sent, times, latencies of packets, topology, communication states, nodes, and packets in the system, an attribute monitor that measures counters for one or more of congestion state, line rate, and communication attributes. A packet scheduler determines a destination node based on information from the scheduler and the attribute monitor, and sends at least a portion of a packet to the destination node.Type: ApplicationFiled: August 12, 2022Publication date: February 15, 2024Inventors: Zsolt Alon Wertheimer, Omer Shabtai, Barak Goldberg, Lion Levi, Gil Mey-Tal, Bar Or Shapira, Dotan David Levi
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Publication number: 20240031121Abstract: In one embodiment, a communication system includes network devices, each comprising a network interface to receive at least one data stream, a given network device being configured to recover a remote clock from the at least one data stream received by the given network device, a frequency synthesizer to generate a clock signal and output the clock signal to each of the network devices, wherein the given network device is configured to find a clock frequency differential between the clock signal and the recovered remote clock, and provide a control signal to the frequency synthesizer responsively to the clock frequency differential, the control signal causes the frequency synthesizer to adjust the clock signal so as to iteratively reduce an absolute value of the clock frequency differential between the clock signal and the recovered remote clock.Type: ApplicationFiled: July 24, 2022Publication date: January 25, 2024Inventors: Dotan David Levi, Arnon Sattinger, Natan Manevich, Wojciech Wasko, Ariel Almog, Bar Or Shapira
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Publication number: 20240014916Abstract: System, methods, and devices for sharing time information between machines are provided. In one example, a system includes a Precision Time Protocol (PTP) Hardware Clock (PHC) and an application. The application receives time information from the PHC along with contextual metadata associated with the time information, analyzes the contextual metadata associated with the time information, and determines a context in which the PHC is disciplined. The context in which the PHC is disciplined may control a manner in which the application uses the time information.Type: ApplicationFiled: July 6, 2022Publication date: January 11, 2024Inventors: Thomas Kernen, Dotan David Levi, Bar Or Shapira, Georgi Mihaylov Chalakov, Aviad Itzhak Raveh
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Patent number: 11853116Abstract: In one embodiment, a device includes a hardware clock to maintain a clock value, a hardware counter to maintain an estimation of a dynamic error bound of the clock value, and a clock controller to intermittently discipline the hardware clock responsively to a remote clock, advance the hardware counter at a rate responsively to a clock drift, and adjust the hardware counter responsively to the hardware clock being disciplined.Type: GrantFiled: January 24, 2022Date of Patent: December 26, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Dotan David Levi, Wojciech Wasko, Eitan Zahavi, Natan Manevich, Bar Shapira
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Patent number: 11835999Abstract: A system is disclosed that includes two or more network elements, each comprising a Precision Time Protocol (PTP) Hardware Clock (PHC) that is adjustable based, at least in part, on physical layer frequency information.Type: GrantFiled: January 18, 2022Date of Patent: December 5, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Bar Shapira, Ariel Almog, Dotan David Levi, Natan Manevich, Thomas Kernen
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Publication number: 20230370305Abstract: In one embodiment, a synchronized communication system includes a plurality of network devices, and clock connections to connect the network devices in a closed loop configuration, wherein the network devices are configured to distribute among the network devices a reference clock time from any selected one of the network devices.Type: ApplicationFiled: August 11, 2022Publication date: November 16, 2023Inventors: Natan Manevich, Dotan David Levi, Wojciech Wasko, Ariel Almog, Bar Shapira
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Publication number: 20230367358Abstract: In one embodiment, a synchronized communication system includes a first network device and a second network device, wherein the first network device includes a first physical hardware clock, and is configured to recover a reference clock time from packets received from a remote clock, find a clock differential between a clock time output by the first physical hardware clock and the recovered reference clock time, provide a control signal to the second network device responsively to the clock differential, and the second network device includes a second physical hardware clock, and is configured to adjust a clock time output by the second physical hardware clock responsively to the control signal.Type: ApplicationFiled: July 19, 2022Publication date: November 16, 2023Inventors: Natan Manevich, Dotan David Levi, Wojciech Wasko, Ariel Almog, Bar Shapira
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Publication number: 20230236624Abstract: In one embodiment, a device includes a hardware clock to maintain a clock value, a hardware counter to maintain an estimation of a dynamic error bound of the clock value, and a clock controller to intermittently discipline the hardware clock responsively to a remote clock, advance the hardware counter at a rate responsively to a clock drift, and adjust the hardware counter responsively to the hardware clock being disciplined.Type: ApplicationFiled: January 24, 2022Publication date: July 27, 2023Inventors: Dotan David Levi, Wojciech Wasko, Eitan Zahavi, Natan Manevich, Bar Shapira
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Publication number: 20230231695Abstract: In one embodiment, a synchronized communication system includes a plurality of compute nodes, and clock connections to connect the compute nodes in a closed loop configuration, wherein the compute nodes are configured to distribute among the compute nodes a master clock frequency from any selected one of the compute nodes.Type: ApplicationFiled: January 20, 2022Publication date: July 20, 2023Inventors: Natan Manevich, Dotan David Levi, Wojciech Wasko, Ariel Almog, Bar Shapira
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Publication number: 20230229188Abstract: A system is disclosed that includes two or more network elements, each comprising a Precision Time Protocol (PTP) Hardware Clock (PHC) that is adjustable based, at least in part, on physical layer frequency information.Type: ApplicationFiled: January 18, 2022Publication date: July 20, 2023Inventors: Bar Shapira, Ariel Almog, Dotan David Levi, Natan Manevich, Thomas Kernen
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Patent number: 11706014Abstract: In one embodiment, a synchronized communication system includes a plurality of compute nodes, and clock connections to connect the compute nodes in a closed loop configuration, wherein the compute nodes are configured to distribute among the compute nodes a master clock frequency from any selected one of the compute nodes.Type: GrantFiled: January 20, 2022Date of Patent: July 18, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Natan Manevich, Dotan David Levi, Wojciech Wasko, Ariel Almog, Bar Shapira
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Patent number: 11606427Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.Type: GrantFiled: December 14, 2020Date of Patent: March 14, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Dotan David Levi, Avraham Ganor, Arnon Sattinger, Natan Manevich, Reuven Kogan, Artiom Tsur, Ariel Almog, Bar Shapira
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Publication number: 20220191275Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.Type: ApplicationFiled: December 14, 2020Publication date: June 16, 2022Inventors: Dotan David Levi, Avraham Ganor, Arnon Sattinger, Natan Manevich, Reuven Kogan, Artiom Tsur, Ariel Almog, Bar Shapira