Patents by Inventor Barbara Chappell

Barbara Chappell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Noise and power optimization in high performance circuits
    Patent number: 6721924
    Abstract: A system and computer implemented method of modifying characteristics of a circuit provide enhanced performance. One embodiment of the method provides for determining a set of objective parameters for the circuit and receiving noise constraints for the circuit. Values of the objective parameters are optimized based on the noise constraints. By using noise constraints in the optimization process, a number of performance issues can be addressed.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: April 13, 2004
    Assignee: Intel Corporation
    Inventors: Priyadarsan Patra, Barbara Chappell
  • Method and apparatus for improving digital circuit design
    Patent number: 6721926
    Abstract: A method and apparatus provide a digital circuit including dynamic logic that minimizes circuit-path delay, residue logic, and circuit area. The method and apparatus use a library of circuit cells to produce a digital circuit design using a mapping algorithm. The mapping algorithm firstly determines an arrangement of circuit cells to minimize the delay in the circuit design, secondly determines an arrangement of circuit cells to minimize the residue logic for the circuit design, thirdly determines an arrangement of circuit cells to minimize the circuit area for the circuit design, and then repeats the process for each node in the circuit until the best circuit design is produced in accordance with pre-determined criteria.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: April 13, 2004
    Assignee: Intel Corporation
    Inventors: Xinning Wang, Prashant Sawkar, Barbara Chappell
  • Time synthesis for power optimization of high performance circuits
    Publication number: 20040060016
    Abstract: A system and computer implemented method of modifying characteristics of a circuit provide enhanced performance. One embodiment of the method provides for determining a set of objective parameters for the circuit and receiving noise constraints for the circuit. Values of the objective parameters are optimized based on the noise constraints. By using noise constraints in the optimization process, a number of performance issues can be addressed.
    Type: Application
    Filed: September 22, 2003
    Publication date: March 25, 2004
    Inventors: Priyadarsan Patra, Barbara Chappell
  • Method and apparatus for improving digital circuit design
    Publication number: 20030145288
    Abstract: A method and apparatus provide a digital circuit including dynamic logic that minimizes circuit-path delay, residue logic, and circuit area. The method and apparatus use a library of circuit cells to produce a digital circuit design using a mapping algorithm. The mapping algorithm firstly determines an arrangement of circuit cells to minimize the delay in the circuit design, secondly determines an arrangement of circuit cells to minimize the residue logic for the circuit design, thirdly determines an arrangement of circuit cells to minimize the circuit area for the circuit design, and then repeats the process for each node in the circuit until the best circuit design is produced in accordance with pre-determined criteria.
    Type: Application
    Filed: January 25, 2002
    Publication date: July 31, 2003
    Inventors: Xinning Wang, Prashant Sawkar, Barbara Chappell
  • Time synthesis for power optimization of high performance circuits
    Publication number: 20030066037
    Abstract: A system and computer implemented method of modifying characteristics of a circuit provide enhanced performance. One embodiment of the method provides for determining a set of objective parameters for the circuit and receiving noise constraints for the circuit. Values of the objective parameters are optimized based on the noise constraints. By using noise constraints in the optimization process, a number of performance issues can be addressed.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 3, 2003
    Inventors: Priyadarsan Patra, Barbara Chappell