Patents by Inventor Barbara Eichinger

Barbara Eichinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11756923
    Abstract: A method of forming a semiconductor device includes providing a carrier comprising a die attach pad, providing a semiconductor die that includes a bond pad disposed on a main surface of the semiconductor die, and providing a metal interconnect element, arranging the semiconductor die on the die attach pad such that the bond pad faces away from the die attach pad, and welding the metal interconnect element to the bond pad, wherein the bond pad comprises first and second metal layers, wherein the second metal layer is disposed between the first metal layer and a semiconductor body of the semiconductor die, wherein a thickness of the first metal layer is greater than a thickness of the second metal layer, and wherein the first metal layer has a different metal composition as the second metal layer.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: September 12, 2023
    Assignee: Infineon Technologies AG
    Inventors: Marian Sebastian Broll, Barbara Eichinger, Alexander Herbrandt, Alparslan Takkac
  • Publication number: 20230063259
    Abstract: A method of forming a semiconductor device includes providing a carrier comprising a die attach pad, providing a semiconductor die that includes a bond pad disposed on a main surface of the semiconductor die, and providing a metal interconnect element, arranging the semiconductor die on the die attach pad such that the bond pad faces away from the die attach pad, and welding the metal interconnect element to the bond pad, wherein the bond pad comprises first and second metal layers, wherein the second metal layer is disposed between the first metal layer and a semiconductor body of the semiconductor die, wherein a thickness of the first metal layer is greater than a thickness of the second metal layer, and wherein the first metal layer has a different metal composition as the second metal layer.
    Type: Application
    Filed: September 1, 2021
    Publication date: March 2, 2023
    Inventors: Marian Sebastian Broll, Barbara Eichinger, Alexander Herbrandt, Alparslan Takkac
  • Patent number: 11552048
    Abstract: A semiconductor device includes a semiconductor die, an electrical contact arranged on a surface of the semiconductor die, and a metal layer arranged on the electrical contact, wherein the metal layer includes a singulated part of at least one of a metal foil, a metal sheet, a metal leadframe, or a metal plate. When viewed in a direction perpendicular to the surface of the semiconductor die, a footprint of the electrical contact and a footprint of the metal layer are substantially congruent.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: January 10, 2023
    Assignee: Infineon Technologies AG
    Inventors: Oliver Hellmund, Barbara Eichinger, Thorsten Meyer, Ingo Muri
  • Patent number: 11488921
    Abstract: A multi-chip device is provided. The multi-chip device includes a first chip, a second chip mounted on the first chip, and a hardened printed or sprayed electrically conductive material forming a sintered electrically conductive interface between the first chip and the second chip.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: November 1, 2022
    Assignee: Infineon Technologies AG
    Inventors: Ali Roshanghias, Alfred Binder, Barbara Eichinger, Stefan Karner, Martin Mischitz, Rainer Pelzer
  • Patent number: 11329021
    Abstract: A semiconductor device and method for fabricating a semiconductor device, comprising a paste layer is disclosed. In one example the method comprises attaching a substrate to a carrier, wherein the substrate comprises a plurality of semiconductor dies. A layer of a paste is applied to the substrate. The layer above cutting regions of the substrate is structured. The substrate is cut along the cutting regions.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: May 10, 2022
    Assignee: Infineon Technologies AG
    Inventors: Francisco Javier Santos Rodriguez, Fabian Craes, Barbara Eichinger, Martin Mischitz, Frederik Otto, Fabien Thion
  • Publication number: 20210167036
    Abstract: A semiconductor device includes a semiconductor die, an electrical contact arranged on a surface of the semiconductor die, and a metal layer arranged on the electrical contact, wherein the metal layer includes a singulated part of at least one of a metal foil, a metal sheet, a metal leadframe, or a metal plate. When viewed in a direction perpendicular to the surface of the semiconductor die, a footprint of the electrical contact and a footprint of the metal layer are substantially congruent.
    Type: Application
    Filed: November 23, 2020
    Publication date: June 3, 2021
    Applicant: Infineon Technologies AG
    Inventors: Oliver HELLMUND, Barbara EICHINGER, Thorsten MEYER, Ingo MURI
  • Publication number: 20210098410
    Abstract: A multi-chip device is provided. The multi-chip device includes a first chip, a second chip mounted on the first chip, and a hardened printed or sprayed electrically conductive material forming a sintered electrically conductive interface between the first chip and the second chip.
    Type: Application
    Filed: October 1, 2020
    Publication date: April 1, 2021
    Inventors: Ali Roshanghias, Alfred Binder, Barbara Eichinger, Stefan Karner, Martin Mischitz, Rainer Pelzer
  • Publication number: 20200161269
    Abstract: A semiconductor device and method for fabricating a semiconductor device, comprising a paste layer is disclosed. In one example the method comprises attaching a substrate to a carrier, wherein the substrate comprises a plurality of semiconductor dies. A layer of a paste is applied to the substrate. The layer above cutting regions of the substrate is structured. The substrate is cut along the cutting regions.
    Type: Application
    Filed: November 15, 2019
    Publication date: May 21, 2020
    Applicant: Infineon Technologies AG
    Inventors: Francisco Javier Santos Rodriguez, Fabian Craes, Barbara Eichinger, Martin Mischitz, Frederik Otto, Fabien Thion
  • Patent number: 10199372
    Abstract: An integrated circuit device including a chip die having a first area with a first thickness surrounding a second area with a second thickness, the first thickness is greater than the second thickness, the chip die having a front-side and a back-side, at least one passive electrical component provided at least one of in or over the chip die in the first area on the front-side, and at least one active electrical component provided at least one of in or over the chip die in the second area on the front-side.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: February 5, 2019
    Assignee: Infineon Technologies AG
    Inventors: Ingo Muri, Iris Moder, Oliver Hellmund, Johannes Baumgartl, Annette Saenger, Barbara Eichinger, Doris Sommer, Jacob Tillmann Ludwig
  • Publication number: 20180374843
    Abstract: An integrated circuit device including a chip die having a first area with a first thickness surrounding a second area with a second thickness, the first thickness is greater than the second thickness, the chip die having a front-side and a back-side, at least one passive electrical component provided at least one of in or over the chip die in the first area on the front-side, and at least one active electrical component provided at least one of in or over the chip die in the second area on the front-side.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 27, 2018
    Inventors: Ingo Muri, Iris Moder, Oliver Hellmund, Johannes Baumgartl, Annette Saenger, Barbara Eichinger, Doris Sommer, Jacob Tillmann Ludwig
  • Patent number: 9929111
    Abstract: A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: March 27, 2018
    Assignee: Infineon Technologies AG
    Inventors: Martin Mischitz, Markus Heinrici, Barbara Eichinger, Manfred Schneegans, Stefan Krivec
  • Publication number: 20170194272
    Abstract: A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.
    Type: Application
    Filed: March 17, 2017
    Publication date: July 6, 2017
    Inventors: Martin MISCHITZ, Markus HEINRICI, Barbara EICHINGER, Manfred SCHNEEGANS, Stefan KRIVEC
  • Patent number: 9620466
    Abstract: A method of manufacturing an electronic device may include: forming at least one electronic component in a substrate; forming a contact pad in electrical contact with the at least one electronic component; wherein forming the contact pad includes: forming a first layer over the substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface, wherein the second layer has a lower porosity than the first layer.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: April 11, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Martin Mischitz, Markus Heinrici, Barbara Eichinger, Manfred Schneegans, Stefan Krivec