Abstract: A method teaches how to fill trench structures formed in a semiconductor substrate. The trench structures are coated in a first deposition process with a first primary filling layer with a high conformity and minimal roughness. A V etching reaching down to a predetermined depth of the trench structure is subsequently performed in order to produce a V-profile.

Abstract: The present invention relates to a method for etching a trench in a semiconductor substrate. More specifically, the present invention relates to a method for etching deep trenches such as those having aspect ratios of 30 and higher. According to embodiments of the invention, a method for etching a trench in a semiconductor substrate includes a first etch cycle wherein the trench is etched to a first depth. Thereafter, a protective liner is deposited on at least the upper part of the trench's sidewalls. The protective liner includes inorganic material. During at least one second etch cycle, the trench is etched to its final depth.

Abstract: A two-step etch process is used to form a vertical collar oxide within the upper portion of a trench capacitor. The first step uses CF4/SiF4/O2 chemistry and ends when the bottom of the collar within the trench is opened although a thin oxide layer still remains on the surface of the PAD-nitride. The second etch step uses C4F8 chemistry to completely remove the remaining silicon oxide layer. The process provides a good uniformity in thickness of the PAD-nitride layer and sufficient collar oxide thickness in the very top section of the collar oxide. The process is applicable for manufacturing deep trench capacitors for DRAM devices.

Abstract: A method teaches how to fill trench structures formed in a semiconductor substrate. The trench structures are coated in a first deposition process with a first primary filling layer with a high conformity and minimal roughness. A V etching reaching down to a predetermined depth of the trench structure is subsequently performed in order to produce a V-profile.

Abstract: A two-step etch process is used to form a vertical collar oxide within the upper portion of a trench capacitor. The first step uses CF4/SiF4/O2 chemistry and ends when the bottom of the collar within the trench is opened although a thin oxide layer still remains on the surface of the PAD-nitride. The second etch step uses C4F8 chemistry to completely remove the remaining silicon oxide layer. The process provides a good uniformity in thickness of the PAD-nitride layer and sufficient collar oxide thickness in the very top section of the collar oxide. The process is applicable for manufacturing deep trench capacitors for DRAM devices.

Abstract: An antireflection layer, preferably a dielectric antireflection layer, is applied by PECVD to a hard mask layer which is composed of doped silicon oxide, with no interruption of the vacuum. The silicon oxide layer is then patterned to form a hard mask and, by way of example, a deep trench etching is performed. The hard mask is removed using an HF/H2SO4 mixture or using an HF/ethylene glycol (EG) mixture at a high etching rate. If the HF/EG mixture is used, an intermediate layer that may be disposed underneath can simultaneously be etched back by a predetermined amount. The integration of two wet etching steps constitutes a major simplification compared with the previous wet etching methods in two different installations.