Patents by Inventor Bardia Pishdad
Bardia Pishdad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210021193Abstract: The disclosed technology can be used to convert direct-current voltage and current from an input to a different or the same voltage and current at an output. One example direct-current to direct-current (DC-DC) power converter includes a first switch connected between a source voltage and a first side of an inductor, a second switch connected between the first side of the inductor and a ground, a third switch connected between a second side of the inductor and the ground, and a fourth switch connected between the second side of the inductor and a capacitor. The power converter may further include a comparator configured to compare an output voltage at the capacitor to a threshold voltage and based on the result of the comparison selectively activate or deactivate the first, second, third, and fourth switches in a power cycle.Type: ApplicationFiled: October 1, 2020Publication date: January 21, 2021Inventors: Farsheed Mahmoudi, Hajir Hedayati, Masoud Ensafdaran, Bardia Pishdad, Monib Ahmed, Tamer Kafafi, Salem Emara
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Patent number: 10811968Abstract: The disclosed technology can be used to convert direct-current voltage and current from an input to a different or the same voltage and current at an output. One example direct-current to direct-current (DC-DC) power converter includes a first switch connected between a source voltage and a first side of an inductor, a second switch connected between the first side of the inductor and a ground, a third switch connected between a second side of the inductor and the ground, and a fourth switch connected between the second side of the inductor and a capacitor. The power converter may further include a comparator configured to compare an output voltage at the capacitor to a threshold voltage and based on the result of the comparison selectively activate or deactivate the first, second, third, and fourth switches in a power cycle.Type: GrantFiled: January 4, 2019Date of Patent: October 20, 2020Assignee: ATLAZO, INC.Inventors: Farsheed Mahmoudi, Hajir Hedayati, Masoud Ensafdaran, Bardia Pishdad, Monib Ahmed, Tamer Kafafi, Salem Emara
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Patent number: 10571945Abstract: Disclosed are low power (e.g., nanowatt) voltage regulator circuits and devices, systems and methods using the same for ultra-low power applications, such as, but not limited to, Internet of things (IoT) applications. The disclosed devices and systems relate to low-dropout (LDO) circuits and methods for constructing and using the same. The disclosed LDOs operate with uniform output frequency characteristics over a wide range of load currents.Type: GrantFiled: February 20, 2019Date of Patent: February 25, 2020Assignee: Atlazo, Inc.Inventor: Bardia Pishdad
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Publication number: 20190258283Abstract: Disclosed are low power (e.g., nanowatt) voltage regulator circuits and devices, systems and methods using the same for ultra-low power applications, such as, but not limited to, Internet of things (IoT) applications. The disclosed devices and systems relate to low-dropout (LDO) circuits and methods for constructing and using the same. The disclosed LDOs operate with uniform output frequency characteristics over a wide range of load currents.Type: ApplicationFiled: February 20, 2019Publication date: August 22, 2019Inventor: Bardia Pishdad
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Publication number: 20190214906Abstract: The disclosed technology can be used to convert direct-current voltage and current from an input to a different or the same voltage and current at an output. One example direct-current to direct-current (DC-DC) power converter includes a first switch connected between a source voltage and a first side of an inductor, a second switch connected between the first side of the inductor and a ground, a third switch connected between a second side of the inductor and the ground, and a fourth switch connected between the second side of the inductor and a capacitor. The power converter may further include a comparator configured to compare an output voltage at the capacitor to a threshold voltage and based on the result of the comparison selectively activate or deactivate the first, second, third, and fourth switches in a power cycle.Type: ApplicationFiled: January 4, 2019Publication date: July 11, 2019Inventors: Farsheed Mahmoudi, Hajir Hedayati, Masoud Ensafdaran, Bardia Pishdad, Monib Ahmed, Tamer Kafafi, Salem Emara
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Patent number: 8729960Abstract: A dynamic adjusting RFID demodulator circuit includes an envelope detector having an input for receiving a modulated RF signal, a fixed reference generator coupled to the input of an RC filter, an RF level dependent signal path adding to the fixed reference level at higher RF energy levels, a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter, and an output for providing a data output signal.Type: GrantFiled: June 6, 2012Date of Patent: May 20, 2014Assignee: Cypress Semiconductor CorporationInventors: Agustin Ochoa, Bardia Pishdad
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Publication number: 20120313698Abstract: A dynamic adjusting RFID demodulator circuit includes an envelope detector having an input for receiving a modulated RF signal, a fixed reference generator coupled to the input of an RC filter, an RF level dependent signal path adding to the fixed reference level at higher RF energy levels, a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter, and an output for providing a data output signal.Type: ApplicationFiled: June 6, 2012Publication date: December 13, 2012Applicant: Ramtron International CorporationInventors: Agustin Ochoa, Bardia Pishdad
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Patent number: 8327204Abstract: A tester for testing high-speed serial transceiver circuitry. The tester includes a jitter generator that uses a rapidly varying phase-selecting signal to select between two or more differently phased clock signals to generate a phase-modulated signal. The phase-selecting signal is designed to contain low- and high-frequency components. The phase-modulated signal is input into a phase filter to filter unwanted high-frequency components. The filtered output of the phase filter is input into a data-transmit serializer to serialize a low-speed parallel word into a high-speed jittered test pattern for input into the transceiver circuitry.Type: GrantFiled: October 26, 2006Date of Patent: December 4, 2012Assignee: DFT Microsystems, Inc.Inventors: Mohamed M. Hafed, Sebastien Laberge, Bardia Pishdad, Clarence K. L. Tam
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Patent number: 7242209Abstract: A module (236, 236?) containing an integrated testing system (108) that includes one or more measurement engines (200, 202) tightly coupled with a compute engine (208). The one or more measurement engines include at least one stimulus instrument (212) for exciting circuitry of a device-under-test (104) with one or more stimulus signals, and at least one measurement instrument (216) that measures the response of the device-under-test to the stimulus signal(s) and generates measurement data. The compute engine includes computation logic circuitry (800) for determining whether or not the circuitry aboard the device-under-test passes or fails. The integrated testing system further includes a communications engine (204) providing two-way communications between the integrated testing system automated testing equipment (116) and/or a dedicated user interface (140) residing on a host computer (136).Type: GrantFiled: May 3, 2004Date of Patent: July 10, 2007Assignee: DFT Microsystems, Inc.Inventors: Gordon W. Roberts, Antonio H. Chan, Geoffrey D. Duerden, Mohamed M. Hafed, Sébastien Laberge, Bardia Pishdad, Clarence K. L. Tam
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Publication number: 20070113119Abstract: A tester for testing high-speed serial transceiver circuitry. The tester includes a jitter generator that uses a rapidly varying phase-selecting signal to select between two or more differently phased clock signals to generate a phase-modulated signal. The phase-selecting signal is designed to contain low-and high-frequency components. The phase-modulated signal is input into a phase filter to filter unwanted high-frequency components. The filtered output of the phase filter is input into a data-transmit serializer to serialize a low-speed parallel word into a high-speed jittered test pattern for input into the transceiver circuitry.Type: ApplicationFiled: October 26, 2006Publication date: May 17, 2007Inventors: Mohamed Hafed, Sebastien Laberge, Bardia Pishdad, Clarence Tam
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Publication number: 20050253617Abstract: A module (236, 236?) containing an integrated testing system (108) that includes one or more measurement engines (200, 202) tightly coupled with a compute engine (208). The one or more measurement engines include at least one stimulus instrument (212) for exciting circuitry of a device-under-test (104) with one or more stimulus signals, and at least one measurement instrument (216) that measures the response of the device-under-test to the stimulus signal(s) and generates measurement data. The compute engine includes computation logic circuitry (800) for determining whether or not the circuitry aboard the device-under-test passes or fails. The integrated testing system further includes a communications engine (204) providing two-way communications between the integrated testing system automated testing equipment (116) and/or a dedicated user interface (140) residing on a host computer (136).Type: ApplicationFiled: May 3, 2004Publication date: November 17, 2005Inventors: Gordon Roberts, Antonio Chan, Geoffrey Duerden, Mohamed Hafed, Sebastien Laberge, Bardia Pishdad, Clarence Tam