Patents by Inventor Bardia Pishdad

Bardia Pishdad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210021193
    Abstract: The disclosed technology can be used to convert direct-current voltage and current from an input to a different or the same voltage and current at an output. One example direct-current to direct-current (DC-DC) power converter includes a first switch connected between a source voltage and a first side of an inductor, a second switch connected between the first side of the inductor and a ground, a third switch connected between a second side of the inductor and the ground, and a fourth switch connected between the second side of the inductor and a capacitor. The power converter may further include a comparator configured to compare an output voltage at the capacitor to a threshold voltage and based on the result of the comparison selectively activate or deactivate the first, second, third, and fourth switches in a power cycle.
    Type: Application
    Filed: October 1, 2020
    Publication date: January 21, 2021
    Inventors: Farsheed Mahmoudi, Hajir Hedayati, Masoud Ensafdaran, Bardia Pishdad, Monib Ahmed, Tamer Kafafi, Salem Emara
  • Patent number: 10811968
    Abstract: The disclosed technology can be used to convert direct-current voltage and current from an input to a different or the same voltage and current at an output. One example direct-current to direct-current (DC-DC) power converter includes a first switch connected between a source voltage and a first side of an inductor, a second switch connected between the first side of the inductor and a ground, a third switch connected between a second side of the inductor and the ground, and a fourth switch connected between the second side of the inductor and a capacitor. The power converter may further include a comparator configured to compare an output voltage at the capacitor to a threshold voltage and based on the result of the comparison selectively activate or deactivate the first, second, third, and fourth switches in a power cycle.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: October 20, 2020
    Assignee: ATLAZO, INC.
    Inventors: Farsheed Mahmoudi, Hajir Hedayati, Masoud Ensafdaran, Bardia Pishdad, Monib Ahmed, Tamer Kafafi, Salem Emara
  • Patent number: 10571945
    Abstract: Disclosed are low power (e.g., nanowatt) voltage regulator circuits and devices, systems and methods using the same for ultra-low power applications, such as, but not limited to, Internet of things (IoT) applications. The disclosed devices and systems relate to low-dropout (LDO) circuits and methods for constructing and using the same. The disclosed LDOs operate with uniform output frequency characteristics over a wide range of load currents.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: February 25, 2020
    Assignee: Atlazo, Inc.
    Inventor: Bardia Pishdad
  • Publication number: 20190258283
    Abstract: Disclosed are low power (e.g., nanowatt) voltage regulator circuits and devices, systems and methods using the same for ultra-low power applications, such as, but not limited to, Internet of things (IoT) applications. The disclosed devices and systems relate to low-dropout (LDO) circuits and methods for constructing and using the same. The disclosed LDOs operate with uniform output frequency characteristics over a wide range of load currents.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 22, 2019
    Inventor: Bardia Pishdad
  • Publication number: 20190214906
    Abstract: The disclosed technology can be used to convert direct-current voltage and current from an input to a different or the same voltage and current at an output. One example direct-current to direct-current (DC-DC) power converter includes a first switch connected between a source voltage and a first side of an inductor, a second switch connected between the first side of the inductor and a ground, a third switch connected between a second side of the inductor and the ground, and a fourth switch connected between the second side of the inductor and a capacitor. The power converter may further include a comparator configured to compare an output voltage at the capacitor to a threshold voltage and based on the result of the comparison selectively activate or deactivate the first, second, third, and fourth switches in a power cycle.
    Type: Application
    Filed: January 4, 2019
    Publication date: July 11, 2019
    Inventors: Farsheed Mahmoudi, Hajir Hedayati, Masoud Ensafdaran, Bardia Pishdad, Monib Ahmed, Tamer Kafafi, Salem Emara
  • Patent number: 8729960
    Abstract: A dynamic adjusting RFID demodulator circuit includes an envelope detector having an input for receiving a modulated RF signal, a fixed reference generator coupled to the input of an RC filter, an RF level dependent signal path adding to the fixed reference level at higher RF energy levels, a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter, and an output for providing a data output signal.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: May 20, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Agustin Ochoa, Bardia Pishdad
  • Publication number: 20120313698
    Abstract: A dynamic adjusting RFID demodulator circuit includes an envelope detector having an input for receiving a modulated RF signal, a fixed reference generator coupled to the input of an RC filter, an RF level dependent signal path adding to the fixed reference level at higher RF energy levels, a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter, and an output for providing a data output signal.
    Type: Application
    Filed: June 6, 2012
    Publication date: December 13, 2012
    Applicant: Ramtron International Corporation
    Inventors: Agustin Ochoa, Bardia Pishdad
  • Patent number: 8327204
    Abstract: A tester for testing high-speed serial transceiver circuitry. The tester includes a jitter generator that uses a rapidly varying phase-selecting signal to select between two or more differently phased clock signals to generate a phase-modulated signal. The phase-selecting signal is designed to contain low- and high-frequency components. The phase-modulated signal is input into a phase filter to filter unwanted high-frequency components. The filtered output of the phase filter is input into a data-transmit serializer to serialize a low-speed parallel word into a high-speed jittered test pattern for input into the transceiver circuitry.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: December 4, 2012
    Assignee: DFT Microsystems, Inc.
    Inventors: Mohamed M. Hafed, Sebastien Laberge, Bardia Pishdad, Clarence K. L. Tam
  • Patent number: 7242209
    Abstract: A module (236, 236?) containing an integrated testing system (108) that includes one or more measurement engines (200, 202) tightly coupled with a compute engine (208). The one or more measurement engines include at least one stimulus instrument (212) for exciting circuitry of a device-under-test (104) with one or more stimulus signals, and at least one measurement instrument (216) that measures the response of the device-under-test to the stimulus signal(s) and generates measurement data. The compute engine includes computation logic circuitry (800) for determining whether or not the circuitry aboard the device-under-test passes or fails. The integrated testing system further includes a communications engine (204) providing two-way communications between the integrated testing system automated testing equipment (116) and/or a dedicated user interface (140) residing on a host computer (136).
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: July 10, 2007
    Assignee: DFT Microsystems, Inc.
    Inventors: Gordon W. Roberts, Antonio H. Chan, Geoffrey D. Duerden, Mohamed M. Hafed, Sébastien Laberge, Bardia Pishdad, Clarence K. L. Tam
  • Publication number: 20070113119
    Abstract: A tester for testing high-speed serial transceiver circuitry. The tester includes a jitter generator that uses a rapidly varying phase-selecting signal to select between two or more differently phased clock signals to generate a phase-modulated signal. The phase-selecting signal is designed to contain low-and high-frequency components. The phase-modulated signal is input into a phase filter to filter unwanted high-frequency components. The filtered output of the phase filter is input into a data-transmit serializer to serialize a low-speed parallel word into a high-speed jittered test pattern for input into the transceiver circuitry.
    Type: Application
    Filed: October 26, 2006
    Publication date: May 17, 2007
    Inventors: Mohamed Hafed, Sebastien Laberge, Bardia Pishdad, Clarence Tam
  • Publication number: 20050253617
    Abstract: A module (236, 236?) containing an integrated testing system (108) that includes one or more measurement engines (200, 202) tightly coupled with a compute engine (208). The one or more measurement engines include at least one stimulus instrument (212) for exciting circuitry of a device-under-test (104) with one or more stimulus signals, and at least one measurement instrument (216) that measures the response of the device-under-test to the stimulus signal(s) and generates measurement data. The compute engine includes computation logic circuitry (800) for determining whether or not the circuitry aboard the device-under-test passes or fails. The integrated testing system further includes a communications engine (204) providing two-way communications between the integrated testing system automated testing equipment (116) and/or a dedicated user interface (140) residing on a host computer (136).
    Type: Application
    Filed: May 3, 2004
    Publication date: November 17, 2005
    Inventors: Gordon Roberts, Antonio Chan, Geoffrey Duerden, Mohamed Hafed, Sebastien Laberge, Bardia Pishdad, Clarence Tam