Abstract: A method and apparatus for automatically correcting errors in the cyclic routing memory of a four-wire TDM telecommunication exchange. The address data in the cyclic routing memory for the control of each of the two switching paths for one four-wire connection through the exchange are each stored in a separate column of the cyclic routing memory. The address data includes parity bits for the input buffer storage device, and parity and busy bits for the switching matrix and group switch devices. The cyclic routing memory also include a common clock means for synchronizing all of the memory circuits with a given time period for a test word for checking synchronization of all of the memories in the exchange. Thus, if the data for the control of one of the switching paths should be lost due to a fault, these data can be derived from the data for the control of the other switching path of the same connection.