Abstract: In a helical scan recorder in which timing signals are recorded on adjacent slant tracks on magnetic tape, an automatic tracking technique for maintaining correct reproduce head to track positioning. The automatic tracking technique includes reproducing recorded timing signals from adjacent slant tracks on magnetic tape, producing first and second simultaneous repetitive reference signals which are coherent with the reproduced timing signals and which are 180.degree. out of phase with each other, simultaneously sampling each of the reference signals with the reproduced timing signals, selecting from the sampled reference signal the signals which are sampled in the mid-range of values thereof, and comparing the selected sampled reference signals and producing a tracking error signal if there is a difference therein.

Abstract: A method and system for recording an asynchronous, biphase encoded signal (such as a MIL-STD-1553B signal), having a first data rate, on a video tape recorder, which may be a consumer video tape recorder, and for recovering the encoded recorded data for subsequent transmission in its original format. The asynchronous biphase enceded signal is synchronized with a clock signal having frequency equal to twice the first data rate. The synchronized signal is then stored temporarily in a buffer memory as if it were an NRZ bit stream having bit rate equal to twice the first data rate. The data is read out of memory and combined with television-type synchronization pulses to produce a television-type signal for recording on the VTR. In the play back mode, the recorded VTR signal is separated into its data component (which consists of bursts of data that occupied the active video areas) and sync component. The invention eliminates the need to use specially designed recorders for asynchronous biphase encoded signals.

Abstract: A motor control method and apparatus employing a speed control loop and a phase control loop, each of which receives a clock signal (F.sub.-- TACH) indicative of the motor's measured phase and rotational frequency, and a synchronizing clock signal (F.sub.-- SYNC) indicative of the desired motor operating speed control loop generates two analog voltage signals, V.sub.-- TACH and V.sub.-- SYNC, from frequency signals F.sub.-- TACH and F.sub.-- SYNC, and generates an error voltage signal proportional to the difference between these two voltage signals. Each frequency signal is first converted into a binary number signal proportional to the associated motor period (inverse frequency). Each such binary number signal is then converted to an analog voltage signal having magnitude proportional to the motor frequency. Each analog voltage signal is thus produced by a two-step process employing the successive reciprocal (division) elements.

Abstract: Apparatus and method for controlling a magnetic head carriage while reading or writing data on a magnetic disc by the use of a pair of heads having zero intertrack spacing and having azimuth angles of plus and minus 45.degree. with the circumference of the disc to sense the timing and phasing of sector sync pulses recorded on the disc and, from such timing phasing, as read by the heads, the rotational position of the disc and the radial position of the head carriage, to generate an appropriate head carriage servo signal which compensates for eccentricity of the disc.

Abstract: A circuit for selectively combining an input signal with a selected fraction of the input signal, twice differentiated, is comprised of two amplifier circuits, each having two input stages and a dual output stage with one output stage of each amplifier circuit being gain controllable in response to a control signal. One of the gain controllable output stages of one amplifier and the non-gain controlled output stage of the other amplifier are connected to a single combined output terminal. The other output stages are connected to a circuit ground. An input signal is supplied to one input stage of each amplifier circuit and the same input signal, after being double differentiated by means of an inductor and capacitor, is supplied in noninverted form to the other input stage of one of the amplifier circuits and is supplied in inverted form to the other input stage of the other amplifier circuit.

Abstract: A wideband recording amplifier having push-pull amplification stages in which each stage comprises a common-base configured transistor amplifier driving an emitter-follower configured amplifier and with a negative feedback signal being applied to the base inputs of the common-base configured amplifiers.

Abstract: A control circuit for selectively combining two or more input signals is comprised of two amplifier circuits, each having two input stages and a dual output stage with one output stage of each amplifier circuit being gain controllable in response to a control signal. The gain controllable output stages are connected to a single combined output terminal and the other output stages are connected to a circuit ground. One input signal is supplied to one input stage of each amplifier circuit whereas the other input signal is supplied in non-inverted form to the other input stage of one of the amplifier circuits and is supplied in inverted form to the other input stage of the other amplifier circuit.

Abstract: A high gain, current mode preamplifier for magnetic media recording and reproduction wherein a differential amplifier has its non-inverting input connected to the circuit ground through a first resistance, its inverting input is connected to the circuit ground through a second resistance, and its output is connected to the inverting input through a third resistance, and with the magnetic head being selectively connected in parallel with the third resistance during recording and across the amplifier input terminals during playback.

Abstract: A motor drive circuit comprising a differential amplifier having inverting and non-inverting inputs and further having an output which is connected to the inputs of separate NPN and PNP, super-alpha configured amplifiers whose combined outputs are supplied to one lead of a motor. The other lead of the motor is connected through a resistor to the circuit ground. The voltage developed across this resistor is supplied to the inverting input of the differential amplifier such that the current through the motor will be equal to the input voltage supplied to the non-inverting input of the differential amplifier divided by the resistance of the resistor.

Abstract: Apparatus, including an injection lock and voltage controlled oscillator, generates a signal that follows the average frequency variations and instantaneous phase variations of a repetitive non-continuous signal. The oscillator injection lock input receives the repetitive signal and its DC control input receives an error signal generated in an AFC loop which derives the difference between the oscillator output and the repetitive signal average frequency. In one particular application, the appartus is useful in a color television signal processing or reproducing system for generating a television color subcarrier signal. The apparatus is further disclosed in connection with a demodulation-remodulation type color corrector in a video reproducing system.

Abstract: A velocity error compensator for a multiple video head VTR in which velocity error compensation is provided for all the lines adjacent a head switch. Separate velocity error detectors are provided in auxiliary channels continuously connected to each respective video head. By providing a mechanical overlap of video heads on the tape velocity error signals are developed for all the lines adjacent a head switch. Depending on the type of velocity error detection employed, the mechanical overlap must be sufficient to provide either simultaneous horizontal sync pulses or both horizontal sync pulses and color bursts from the adjacent heads. Suitable switching is provided to continuously apply the correct velocity error signal to the main channel video signal which is to be corrected. The arrangement avoids banding that develops in multi-generation copies where a line adjacent a head switch is not velocity corrected.