Patents by Inventor Barry A. Wagner

Barry A. Wagner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070139426
    Abstract: A memory hub permits a graphics processor to access random access memories, such as dynamic random access memories (DRAMs). In one implementation, the memory hub permits an increase in effective memory bandwidth by aggregating the memory of two or more memories. In another implementation, the memory hub permits a graphics processor to offload memory access interfacing operations to the memory hub.
    Type: Application
    Filed: December 15, 2005
    Publication date: June 21, 2007
    Inventors: Joseph Greco, Jonah Alben, Barry Wagner, Anthony Tamasi
  • Publication number: 20070133167
    Abstract: The present invention pertains to a computer chassis with improved airflow to reduce the occurrence of trapped air pockets and increase heat transfer from components within the chassis. The computer chassis includes a plurality of chambers, wherein each of the chambers is separated by a partition. The partitions are operable to reduce the occurrence of trapped air pockets and increase heat transfer from components of the chassis by causing air to flow through each of the chambers. The computer chassis further includes at least two air vents, wherein each of the chambers is coupled to at least one of the at least two air vents through which air enters the chamber, and wherein each of the chambers is coupled to at least one of the at least two air vents through which air exits the chamber.
    Type: Application
    Filed: December 9, 2005
    Publication date: June 14, 2007
    Inventors: Barry Wagner, Don Le, William Tsu
  • Publication number: 20050240744
    Abstract: Methods and apparatuses that enable memory devices to inform graphical processing systems about the results of WRITE de-skew training. A WRITE-TRAINING mode is added to a memory device. When the WRITE-TRAINING mode is asserted the memory data mask (DM) pin is converted to an output port. Incoming WRITE data is strobed-into the memory device and the resulting data pattern is compared to a desired pattern. If the incoming WRITE data and strobed-in data match, that result is sent to the graphical processing system by setting the DM pin HIGH. If the incoming WRITE data and the strobed-in data do not match, that result is sent to the graphical processing system by setting the DM pin LOW. Beneficially, the incoming data and the desired pattern are derived from pseudo random bit sequence (PRBS) sources.
    Type: Application
    Filed: August 3, 2004
    Publication date: October 27, 2005
    Inventors: Ashfaq Shaikh, Barry Wagner
  • Patent number: 6947865
    Abstract: A processor power supply voltage controller. The controller includes a temperature sensor configured to sense a temperature of a processor and generate a temperature signal in accordance therewith. A regulator is coupled to provide a power supply voltage to the processor. The regulator is coupled to receive the temperature signal and control the power supply voltage to maintain a substantially stable crosstalk level within the processor.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: September 20, 2005
    Assignee: nVIDIA Corporation
    Inventors: Ludger Mimberg, Barry Wagner, Mau Lao
  • Patent number: 6496404
    Abstract: A memory system is disclosed. The memory system comprises a circuit board and at least two memory devices mounted on the circuit board. Each of the at least two memory devices includes a plurality of pins for receiving and providing signals. At least a first portion of the pins of one of the at least two memory devices are coupled to at least a second portion of the pins of the other at least two memory devices such that a pair of the first portion coupled to a pin of the second portion forms a coupled load. The coupled load then appears as one load. Accordingly, in a system in accordance with the present invention, at least two memory devices are provided on a circuit board. Each of the at least two memory devices includes a plurality of pins.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: December 17, 2002
    Assignee: NVIDIA Corporation
    Inventors: Larry Fiedler, Simon Thomas, Barry Wagner
  • Patent number: 6362997
    Abstract: A memory system is disclosed. The memory system comprises a circuit board and at least two memory devices mounted on the circuit board. Each of the at least two memory devices includes a plurality of pins for receiving and providing signals. At least a first portion of the pins of one of the at least two memory devices are coupled to at least a second portion of the pins of the other at least two memory devices such that a pair of the first portion coupled to a pin of the second portion forms a coupled load. The coupled load then appears as one load. Accordingly, in a system in accordance with the present invention, at least two memory devices are provided on a circuit board. Each of the at least two memory devices includes a plurality of pins.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: March 26, 2002
    Assignee: nVIDIA
    Inventors: Larry Fiedler, Simon Thomas, Barry Wagner
  • Patent number: 4977740
    Abstract: A fuel injector 28 for gaseous and liquid fuel is disclosed. Various construction details are developed to enhance mixing and reduce nitrogen oxide emissions in a compact design. In one embodiment of the invention, the fuel nozzle 28 includes two radially spaced passages 68, 104 for air having swirlers 86, 112 and a liquid fuel passage 57 disposed between the air passages and a gaseous fuel passage 116 outwardly of the outermost air passage. In one detailed embodiment, a center body 76 is disposed in the inner air chamber to promote re-ciruclation of the hot gases.
    Type: Grant
    Filed: June 7, 1989
    Date of Patent: December 18, 1990
    Assignee: United Technologies Corporation
    Inventors: Thomas J. Madden, Barry C. Schlein, W. Barry Wagner