Abstract: An apparatus and method is disclosed that provides a random data generator that is less susceptible to error sources resulting from negative feedback biasing. This invention utilizes a shift register and a multiplexer, controlled by the shift register, to provide the feedback to an amplifier. This improves the correlation between the present data output bit and the following bit.

Abstract: An apparatus and method is disclosed for the protection of computer programs through the use of the principles of conditional inversion and permutation. These security features are designed as part of the chip in a fashion to minimize the changes required to any existing microprocessor design and to be transparent to firmware execution. The programs are first encrypted by permutation which reorders the lines according to an allocated scheme and then conditionally inverted through a set of dual input exclusive OR gates. The reordering of lines in the permutator and the conditional inversion in the inverter are accomplished through the use of variables some of which are permanently prestored in the microprocessor and some of which are entered by the programmer.

Abstract: Method and apparatus for operating a CRC in a parallel, quasi parallel or serial fashion. The device allows all the bits in a word to be read and loaded into the cyclic redundancy checker (CRC) register in one clock cycle putting it in sync with the rest of the system. The CRC consists of a set of logic gates for converting a parallel input signal to a converted parallel input signal that is the equivalent of the conversion performed on the serial data input into the prior art cyclic redundancy checkers. The bits of the converted parallel input signal are then combined in another set of logic gates to provide the CRC output.

Abstract: A graphics generator responds to signals defining a pattern to be displayed. The pattern comprises a plurality of pattern segments each of which may be a vector, conic or alpha numeric character. The graphics generator produces digital signals which are capable of driving a display through an A/D converter to produce a visual representation of the desired pattern segment. The pattern segment is broken up into a plurality of strokes of constant length regardless of orientation. Chaining the strokes on the display thus produces the desired pattern. An input signal defining a vector defines both the length and the orientation of the vector and these quantities are stored in length and orientation registers, respectively. The orientation signal is employed as an address into a sine/cos memory to derive stroke components in an orthogonal coordinate system which are then added to a beginning position of the stroke to produce the stroke end point.