Abstract: The present invention comprises nano obelisks and nanostructures and methods and processes for same. The nano obelisks of the present invention are advantageous structures for use as electron source emitters. For example, the ultra sharp obelisks can be used as an emitter source to generate highly coherent and high energy electrons with high current.

Abstract: Embodiments of the invention are directed toward the deposition of Graphene on a semiconductor substrate. In some embodiments, these processes can occur at low temperature levels during a back end of the line process. For example, Graphene can be deposited in a CVD reactor at a processing temperature that is below 600° C. to protect previously deposited layers that may be susceptible to sustained higher temperatures. Graphene deposition can include the deposition of an underlayer (e.g., cobalt) followed by the flow of a carbon precursor (e.g., acetylene) at the processing temperature. Graphene can then be synthesized with during cooling, an RTP cure, and/or a UV cure.

Abstract: The present invention comprises nano obelisks and nanostructures and methods and processes for same. The nano obelisks of the present invention are advantageous structures for use as electron source emitters. For example, the ultra sharp obelisks can be used as an emitter source to generate highly coherent and high energy electrons with high current.

Abstract: A metal/metal nitride barrier layer for semiconductor device applications. The barrier layer is particularly useful in contact vias where high conductivity of the via is important, and a lower resistivity barrier layer provides improved overall via conductivity.

Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of: a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper.

Abstract: In one embodiment, a method for forming a tungsten-containing material on a substrate is provided which includes positioning a substrate having an underlying tungsten layer within a process chamber and depositing a tungsten-containing barrier layer on the underlying tungsten layer during a cyclical layer deposition process. The tungsten-containing barrier layer contains a refractory metal nitride material. The method further provides depositing a seed layer on the tungsten-containing barrier layer during a vapor deposition process and depositing a bulk tungsten layer on the seed layer during a chemical vapor deposition process.

Abstract: A method for depositing a refractory metal nitride barrier layer having a thickness of about 20 angstroms or less is provided. In one aspect, the refractory metal nitride layer is formed by introducing a pulse of a metal-containing compound followed by a pulse of a nitrogen-containing compound. The refractory metal nitride barrier layer provides adequate barrier properties and allows the grain growth of the first metal layer to continue across the barrier layer into the second metal layer thereby enhancing the electrical performance of the interconnect.

Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces.

Abstract: A method for depositing a refractory metal nitride barrier layer having a thickness of about 20 angstroms or less is provided. In one aspect, the refractory metal nitride layer is formed by introducing a pulse of a metal-containing compound followed by a pulse of a nitrogen-containing compound. The refractory metal nitride barrier layer provides adequate barrier properties and allows the grain growth of the first metal layer to continue across the barrier layer into the second metal layer thereby enhancing the electrical performance of the interconnect.

Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.

Abstract: Methods of forming copper interconnects free from via-to-via leakage currents and having low resistances are disclosed. In a first aspect, a barrier layer is deposited on the first metal layer prior to copper oxide sputter-etching to prevent copper atoms from reaching the interlayer dielectric and forming via-to-via leakage current paths therein. In a second aspect, a capping dielectric barrier layer is deposited over the first metal layer prior to sputter etching. During sputter-etching, the capping dielectric barrier layer redistributes on the sidewalls of the interlayer dielectric, preventing sputter-etched copper atoms from reaching the interlayer dielectric and forming via-to-via leakage paths therein. In a third aspect, both a capping dielectric barrier layer and a barrier layer are deposited over the first metal layer prior to sputter-etching to prevent copper atoms produced during sputter-etching from reaching the interlayer dielectric and forming via-to-via leakage paths therein.

Abstract: We have discovered a method of providing a thin approximately from about 2 ? to about 100 ? thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the TaN seed layer exhibits low resistivity, in the range of 30 ?? cm and can be used as a low resistivity barrier layer in the absence of an alpha tantalum layer. In one embodiment of the method, a TaN film is altered on its surface form the TaN seed layer. In another embodiment of the method, a Ta film is altered on its surface to form the TaN seed layer.

Abstract: We have discovered a method of providing a thin, approximately from about 2 ? to about 100 ? thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the TaN seed layer exhibits low resistivity, in the range of 30 ??cm and can be used as a low resistivity barrier layer in the absence of an alpha tantalum layer. In one embodiment of the method, a TaN film is altered on its surface to form the TaN seed layer. In another embodiment of the method, a Ta film is altered on its surface to form the TaN seed layer.

Abstract: Plasma etching or resputtering of a layer of sputtered materials including opaque metal conductor materials may be controlled in a sputter reactor system. In one embodiment, resputtering of a sputter deposited layer is performed after material has been sputtered deposited and while additional material is being sputter deposited onto a substrate. A path positioned within a chamber of the system directs light or other radiation emitted by the plasma to a chamber window or other optical view-port which is protected by a shield against deposition by the conductor material. In one embodiment, the radiation path is folded to reflect plasma light around the chamber shield and through the window to a detector positioned outside the chamber window.

Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper.

Abstract: A method and apparatus for metallization process sequences are provided for forming reliable interconnects including lines, vias and contacts. An initial barrier layer, such as Ta or TaN, is first formed on a patterned substrate followed by seed layer formed using high density plasma PVD techniques. The structure is then filled using either 1) electroplating, 2) PVD reflow, 3) CVD followed by PVD reflow, or 4) CVD.

Abstract: A method of filling trenches or vias on a semiconductor workpiece surface with copper using sputtering techniques. A copper wetting layer and a copper fill layer may both be applied by sputtering techniques. The thin wetting layer of copper is applied at a substrate surface temperature ranging between about 20° C. to about 250° C., and subsequently the temperature of the substrate is increased, with the application of the sputtered copper fill layer beginning at above at least about 200° C. and continuing while the substrate temperature is increased to a temperature as high as about 600° C. Preferably the substrate temperature during application of the sputtered fill layer ranges between about 300° C. and about 500° C.

Abstract: The invention generally provides a method for preparing a surface for electrochemical deposition comprising forming a high conductance barrier layer on the surface and depositing a seed layer over the high conductance barrier layer. Another aspect of the invention provides a method for filling a structure on a substrate, comprising depositing a high conductance barrier layer on one or more surfaces of the structure, depositing a seed layer over the barrier layer, and electrochemically depositing a metal to fill the structure.

Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of: a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper.

Abstract: The invention generally provides a method for preparing a surface for electrochemical deposition comprising forming a high conductance barrier layer on the surface and depositing a seed layer over the high conductance barrier layer. Another aspect of the invention provides a method for filling a structure on a substrate, comprising depositing a high conductance barrier layer on one or more surfaces of the structure, depositing a seed layer over the barrier layer, and electrochemically depositing a metal to fill the structure.