Patents by Inventor Barry Concklin
Barry Concklin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11537114Abstract: Example implementations include a method of pre-bootup fault monitor of a LASER diode driver output, by applying a first power to a pre-bootup fault monitor device, setting a fault condition at the pre-bootup fault monitor device to a no-fault state, initiating the pre-bootup fault monitor device, determining whether a first impedance of driver output satisfies an impedance threshold, and in response to a determination that the first impedance satisfies the impedance threshold, applying a second power to the output device.Type: GrantFiled: March 1, 2021Date of Patent: December 27, 2022Assignee: Renesas Electronics America Inc.Inventors: Lokesh Kumath, Muthukumaran Chandrasekaran, Barry Concklin, Bin Liu, Ha Chu Vu, Matthew Cole
-
Patent number: 8450941Abstract: Embodiments of the present invention relate to methods and circuits for use with a system including a light emitting element (e.g., a laser diode or light emitting diode) that is driven by a current produced by a current output digital-to-analog converter (DAC), wherein the light emitting element or the DAC is powered by a supply voltage produced by a voltage supply. In accordance with an embodiment, a measure indicative of a voltage at an output of the DAC is obtained, wherein the voltage at the output of the DAC is indicative of a voltage headroom available for the DAC. The measure indicative of the voltage at the output of the DAC is compared to one or more predetermined references, and the supply voltage is controlled based on the comparison(s).Type: GrantFiled: January 25, 2011Date of Patent: May 28, 2013Assignee: Intersil Americas Inc.Inventors: Dimitrios Katsis, Barry Concklin, Daryl Chamberlin, Peter J. Mole
-
Publication number: 20120188461Abstract: Portions of a digital signal are buffered prior to being provided to a sub-system (e.g., a segmented DAC of a LDD) that is responsive to the digital signal. While being buffered, there is a determination, based on the buffered portions of the digital signal, of when one or more portions of the sub-system and/or another sub-system can be switched from a first state to a second state, where the second state results in less power dissipation than the first state. Based on results of the determination(s), the state of one or more portions of the sub-system and/or another sub-system is/are selectively switched from the first state to the second state, or vice versa. Eventually, the portions of the digital signal are provided to the sub-system so that the sub-system can respond to the portions of the digital signal.Type: ApplicationFiled: April 2, 2012Publication date: July 26, 2012Applicant: INTERSIL AMERICAS INC.Inventors: Dimitrios Katsis, Barry Concklin
-
Patent number: 8212703Abstract: A segmented digital-to-analog converter (DAC) includes a plurality of sub-DACs, each of which is adapted to receive a separate reference current that specifies a transfer function of the sub-DAC. A magnitude of the reference current provided to each sub-DAC is separately programmable to thereby separately control a gain of each sub-DAC. The output of the DAC can be used to drive a load having a load transfer function that differs from a desired transfer function. In an embodiment, the separate reference currents provided the sub-DACs of the DAC are programmed to implement a DAC transfer function that causes the DAC and the load (driven by the output of the DAC) to collectively have an effective transfer function that is substantially similar to the desired transfer function.Type: GrantFiled: May 9, 2011Date of Patent: July 3, 2012Assignee: Intersil Americas Inc.Inventors: Dimitrios Katsis, Barry Concklin
-
Publication number: 20120153861Abstract: Embodiments of the present invention relate to methods and circuits for use with a system including a light emitting element (e.g., a laser diode or light emitting diode) that is driven by a current produced by a current output digital-to-analog converter (DAC), wherein the light emitting element or the DAC is powered by a supply voltage produced by a voltage supply. In accordance with an embodiment, a measure indicative of a voltage at an output of the DAC is obtained, wherein the voltage at the output of the DAC is indicative of a voltage headroom available for the DAC. The measure indicative of the voltage at the output of the DAC is compared to one or more predetermined references, and the supply voltage is controlled based on the comparison(s).Type: ApplicationFiled: January 25, 2011Publication date: June 21, 2012Applicant: INTERSIL AMERICAS INC.Inventors: Dimitrios Katsis, Barry Concklin, Daryl Chamberlin, Peter J. Mole
-
Patent number: 8164502Abstract: Portions of a digital signal are buffered prior to being provided to a sub-system (e.g., a segmented DAC of a LDD) that is responsive to the digital signal. While being buffered, there is a determination, based on the buffered portions of the digital signal, of when one or more portions of the sub-system and/or another sub-system can be switched from a first state to a second state, where the second state results in less power dissipation than the first state. Additionally, or alternatively, while the portions of the digital signal are being buffered, there can be a determination, based on the buffered portions of the digital signal, of when one or more system related parameters can be adjusted to temporarily reduce power dissipation. Based on results of the determination(s), the state of one or more portions of the sub-system and/or another sub-system is/are selectively switched from the first state to the second state, or vice versa.Type: GrantFiled: May 6, 2011Date of Patent: April 24, 2012Assignee: Intersil Americas Inc.Inventors: Dimitrios Katsis, Barry Concklin
-
Publication number: 20110205096Abstract: A segmented digital-to-analog converter (DAC) includes a plurality of sub-DACs, each of which is adapted to receive a separate reference current that specifies a transfer function of the sub-DAC. A magnitude of the reference current provided to each sub-DAC is separately programmable to thereby separately control a gain of each sub-DAC. The output of the DAC can be used to drive a load having a load transfer function that differs from a desired transfer function. In an embodiment, the separate reference currents provided the sub-DACs of the DAC are programmed to implement a DAC transfer function that causes the DAC and the load (driven by the output of the DAC) to collectively have an effective transfer function that is substantially similar to the desired transfer function.Type: ApplicationFiled: May 9, 2011Publication date: August 25, 2011Applicant: Intersil Americas Inc.Inventors: Dimitrios Katsis, Barry Concklin
-
Publication number: 20110205095Abstract: Portions of a digital signal are buffered prior to being provided to a sub-system (e.g., a segmented DAC of a LDD) that is responsive to the digital signal. While being buffered, there is a determination, based on the buffered portions of the digital signal, of when one or more portions of the sub-system and/or another sub-system can be switched from a first state to a second state, where the second state results in less power dissipation than the first state. Additionally, or alternatively, while the portions of the digital signal are being buffered, there can be a determination, based on the buffered portions of the digital signal, of when one or more system related parameters can be adjusted to temporarily reduce power dissipation. Based on results of the determination(s), the state of one or more portions of the sub-system and/or another sub-system is/are selectively switched from the first state to the second state, or vice versa.Type: ApplicationFiled: May 6, 2011Publication date: August 25, 2011Applicant: INTERSIL AMERICAS INC.Inventors: Dimitrios Katsis, Barry Concklin
-
Patent number: 7961130Abstract: Portions of a digital signal are buffered prior to being provided to a sub-system (e.g., a segmented DAC of a LDD) that is responsive to the digital signal. While being buffered, there is a determination, based on the buffered portions of the digital signal, of when one or more portions of the sub-system and/or another sub-system can be switched from a first state to a second state, where the second state results in less power dissipation than the first state. Additionally, or alternatively, while the portions of the digital signal are being buffered, there can be a determination, based on the buffered portions of the digital signal, of when one or more system related parameters can be adjusted to temporarily reduce power dissipation. Based on results of the determination(s), the state of one or more portions of the sub-system and/or another sub-system is/are selectively switched from the first state to the second state, or vice versa.Type: GrantFiled: October 28, 2009Date of Patent: June 14, 2011Assignee: Intersil Americas Inc.Inventors: Dimitrios Katsis, Barry Concklin
-
Patent number: 7952507Abstract: Provided herein are segmented digital to analog converters (DACs), methods for use therewith, and systems that include one or more such DACs. According to an embodiment, a DAC includes a plurality of sub-DACs, a DAC input adapted to receive a multi-bit digital input and a DAC output adapted to output an analog output current in response to and indicative of the digital input. Each sub-DAC is adapted to receive a separate reference current that specifies a transfer function of the sub-DAC. A magnitude of the reference current provided to each sub-DAC is separately programmable to thereby separately control a gain of each sub-DAC.Type: GrantFiled: October 28, 2009Date of Patent: May 31, 2011Assignee: Intersil Americas Inc.Inventors: Dimitrios Katsis, Barry Concklin
-
Publication number: 20110025540Abstract: Portions of a digital signal are buffered prior to being provided to a sub-system (e.g., a segmented DAC of a LDD) that is responsive to the digital signal. While being buffered, there is a determination, based on the buffered portions of the digital signal, of when one or more portions of the sub-system and/or another sub-system can be switched from a first state to a second state, where the second state results in less power dissipation than the first state. Additionally, or alternatively, while the portions of the digital signal are being buffered, there can be a determination, based on the buffered portions of the digital signal, of when one or more system related parameters can be adjusted to temporarily reduce power dissipation. Based on results of the determination(s), the state of one or more portions of the sub-system and/or another sub-system is/are selectively switched from the first state to the second state, or vice versa.Type: ApplicationFiled: October 28, 2009Publication date: February 3, 2011Applicant: Intersil Americas Inc.Inventors: Dimitrios Katsis, Barry Concklin
-
Publication number: 20110006934Abstract: Provided herein are segmented digital to analog converters (DACs), methods for use therewith, and systems that include one or more such DACs. According to an embodiment, a DAC includes a plurality of sub-DACs, a DAC input adapted to receive a multi-bit digital input and a DAC output adapted to output an analog output current in response to and indicative of the digital input. Each sub-DAC is adapted to receive a separate reference current that specifies a transfer function of the sub-DAC. A magnitude of the reference current provided to each sub-DAC is separately programmable to thereby separately control a gain of each sub-DAC.Type: ApplicationFiled: October 28, 2009Publication date: January 13, 2011Applicant: Intersil Americas Inc.Inventors: Dimitrios Katsis, Barry Concklin