Abstract: An optical line terminal that includes an activation mechanism.

Abstract: The present invention is generally directed towards a system and method for providing a high speed switching driver to transmit data information. A first current is switched through a diode or shunted through an alternate path to selectively bias the diode. A second current can also be selectively switched through the diode to modulate a light energy output transmitted from the diode. Based on this configuration, fast bias-switching for generating a modulated laser diode output can be achieved by selectively switching the bias current through the diode or alternate path. Consequently, a solid state device can be controlled to transmit data information after a relatively minimal setup time delay to bias the diode.

Abstract: An apparatus and method is disclosed for receiving packets having a wide dynamic range of power levels over a shared medium in a communications system. The receiver responds to a packet with a different power level within an inter-packet time and maintains a constant logic level for a long string of ‘ones’ or ‘zeros’ within a packet. An AC-coupled pre-amplifier provides a voltage signal having a slowly decaying power level for a long string of ‘ones’ or ‘zeros’ within the packet. A differential amplifier with hysteresis, ignores the slowly decaying power level of a long string of ‘ones’ or ‘zeros’ within the packet and does not overwrite the power level of the long string until it detects the end of the string.

Abstract: The present invention is generally directed towards a system and method for providing a high speed switching driver to transmit data information. A first current is switched through a diode or shunted through an alternate path to selectively bias the diode. A second current can also be selectively switched through the diode to modulate a light energy output transmitted from the diode. Based on this configuration, fast bias-switching for generating a modulated laser diode output can be achieved by selectively switching the bias current through the diode or alternate path. Consequently, a solid state device can be controlled to transmit data information after a relatively minimal setup time delay to bias the diode.

Abstract: The present invention is generally directed towards a system and method for providing a high speed switching driver to transmit data information. A first current is switched through a diode or shunted through an alternate path to selectively bias the diode. A second current can also be selectively switched through the diode to modulate a light energy output transmitted from the diode. Based on this configuration, fast bias-switching for generating a modulated laser diode output can be achieved by selectively switching the bias current through the diode or alternate path. Consequently, a solid state device can be controlled to transmit data information after a relatively minimal setup time delay to bias the diode.

Abstract: The present invention is generally directed towards a system and method for providing a high speed switching driver to transmit data information. A first current is switched through a diode or shunted through an alternate path to selectively bias the diode. A second current can also be selectively switched through the diode to modulate a light energy output transmitted from the diode. Based on this configuration, fast bias-switching for generating a modulated laser diode output can be achieved by selectively switching the bias current through the diode or alternate path. Consequently, a solid state device can be controlled to transmit data information after a relatively minimal setup time delay to bias the diode.

Abstract: A method and system provide an approach to support the aggregation of multiple broadband services including voice, high speed data, video and image through the transmission of packets and cells simultaneously over a passive optical network. The method of communication between a central terminal and plural remote terminals over a passive optical network includes transmitting downstream data from the central terminal to the plural remote terminals in successive downstream frames over a downstream network portion and transmitting upstream data from the plural remote terminals to the central terminal in respective upstream timeslots over an upstream network portion, the upstream timeslots forming successive upstream frames. The downstream data includes downstream packet data and downstream ATM cell data and the upstream data including upstream packet data and upstream ATM cell data.

Abstract: An AC-coupled pre-amplifier is provided for amplifying a signal received in a packet transmitted in burst mode. The pre-amplifier provides a fast time constant for a driven edge of a received signal and a slower time constant for a undriven edge of the received signal. The decay of the undriven edge is faster than the inter-packet time between two received packets. The dual response times, allows for the inter-packet time to be less than the longest string of constant data received in a packet.

Abstract: A method of data recovery includes receiving a data stream of data bits and splitting the data stream to N identical input data streams where N is an integer greater than 1. Each of the N input data streams is delayed with respect to the preceding one by a bit time divided by N. Each of the N delayed input data streams is then sampled using a local clock to provide N samples which form an N-bit sample code per clock period. At least two successive sample codes are decoded to select one of the N delayed input data streams most aligned with the local clock. The selected data stream is thereby retimed to the local clock for synchronous processing of the data stream payload. The local system clock is held constant in the presence of multiple asynchronous data streams for improved robustness in overall system performance.

Abstract: A method of data recovery includes receiving a data stream of data bits and splitting the data stream to N identical input data streams where N is an integer greater than 1. Each of the N input data streams is delayed with respect to the preceding one by a bit time divided by N. Each of the N delayed input data streams is then sampled using a local clock to provide N samples which form an N-bit sample code per clock period. At least two successive sample codes are decoded to select one of the N delayed input data streams most aligned with the local clock. The selected data stream is thereby retimed to the local clock for synchronous processing of the data stream payload. The local system clock is held constant in the presence of multiple asynchronous data streams for improved robustness in overall system performance.