Abstract: An inner assembly and an outer assembly of a hypotrochoid apparatus with a spindle located inside the inner assembly where a spindle proximate end and a spindle distal end each employ at least one mechanical interface. An eccentric hub provides a central throughbore for receiving a spindle, where the spindle is rotatably engaged with the eccentric hub and the inner bore which enhances vibration when the spindle is rotating and the eccentric hub is engaged.

Abstract: An inner assembly and an outer assembly of a hypotrochoid apparatus with a spindle located inside the inner assembly where a spindle proximate end and a spindle distal end each employ at least one mechanical interface. An eccentric hub provides a central throughbore for receiving a spindle, where the spindle is rotatably engaged with the eccentric hub and the inner bore which enhances vibration when the spindle is rotating and the eccentric hub is engaged.

Abstract: The present invention provides a RapidIO device that includes a switch fabric and a port coupled to the switch fabric. The port is configured to establish a LP-Serial link with RapidIO endpoints, add packet headers having the same acknowledgement identifier to a plurality of contiguous packets and generate a link cyclical redundancy check value for the plurality of contiguous packets having the same acknowledgement identifier, the link cyclical redundancy check code computed to include the value of an acknowledgement identifier header. The port is configured to sequentially output the plurality of packets having the same acknowledgement identifier on the LP-Serial link. In addition, methods are disclosed for formatting bit streams in a RapidIO based communication system and communicating RapidIO packets.

Abstract: The present invention provides a RapidIO device that includes a switch fabric and a port coupled to the switch fabric. The port is configured to establish a LP-Serial link with RapidIO endpoints, add packet headers having the same acknowledgement identifier to a plurality of contiguous packets and generate a link cyclical redundancy check value for the plurality of contiguous packets having the same acknowledgement identifier, the link cyclical redundancy check code computed to include the value of an acknowledgement identifier header. The port is configured to sequentially output the plurality of packets having the same acknowledgement identifier on the LP-Serial link. In addition, methods are disclosed for formatting bit streams in a RapidIO based communication system and communicating RapidIO packets.

Abstract: A Method and Apparatus for Channel Equalization in High Speed S-RIO based Communication Systems have been disclosed. By adjusting equalizer coefficients based on 8B10B error counts and an error threshold, a receiver may be dynamically adjusted. By adjusting transmitter pre-emphasis based on 8B10B error counts and an error threshold, a transmitter may be dynamically adjusted. Both the transmitter and receiver may be adjusted dynamically based on 8B10B error counts and different error thresholds.

Abstract: The present invention relates to a method and apparatus for ensuring fault detection and system recovery in a multiprocessor computing system. This system comprises a multitude of processing element modules, input/output processor modules and shared memory modules. Each module within the system includes an identical period sanity timer capable to reset the module once a predetermined limit count is reached. If a global clear signal is not received from the operating system scheduler by all modules prior to the expiry of the sanity timers, a system-wide reset is effected. Each processing element module within the system further includes a watchdog timer capable to reset the module once a predetermined limit count is reached. If a process is not run by the operating system scheduler on the processing element before the expiry of the watchdog timer, effectively clearing the watchdog timer, the processing element is reset and removed from service.