Abstract: Control circuitry handles inrush current, and may provide under voltage and/or over voltage monitoring and handling, as well as remote enable handling. The circuitry may advantageously employ a sense capacitor in parallel with an input capacitor (e.g., bulk input filter capacitor), and a current mirror to produce a signal proportional to input current. A clamp circuit may control a series pass device to regulate current in response to the proportional signal, or to interrupt current flow in response to an under voltage or over voltage condition or receipt of a signal indicative of a disable state. An enable signal may be summed into a comparator that handles under voltage condition determination.

Abstract: A power converter provides current limit/current share functionality, allowing use in a point-of-load architecture and/or in parallel with one or more other power converters. An inner current control loop may sense output current over only a portion of a duty cycle, for example at a low side active switch. The resulting signal is compensated, and may be level shifted, for example via a resistor divider network, and supplied to a current control amplifier. An outer voltage control loop may sense output voltage, and provide a voltage error signal from a voltage error amplifier to the resistor divider network. Power converters are operable as masters or slaves, and include sense input and trim input terminals.

Abstract: A switch mode power converter provides high efficiency at light and no load conditions by utilizing a variable inductance swinging choke at the output of a synchronous rectifier. The use of the swinging choke with a synchronous rectifier eliminates power inefficiencies caused by currents that circulate from the output capacitance to the input capacitance during no load conditions.

Abstract: A power converter provides current limit/current share functionality, allowing use in a point-of-load architecture and/or in parallel with one or more other power converters. An inner current control loop may sense output current over only a portion of a duty cycle, for example at a low side active switch. The resulting signal is compensated, and may be level shifted, for example via a resistor divider network, and supplied to a current control amplifier. An outer voltage control loop may sense output voltage, and provide a voltage error signal from a voltage error amplifier to the resistor divider network. Power converters are operable as masters or slaves, and include sense input and trim input terminals.

Abstract: Control circuitry handles inrush current, and may provide under voltage and/or over voltage monitoring and handling, as well as remote enable handling. The circuitry may advantageously employ a sense capacitor in parallel with an input capacitor (e.g., bulk input filter capacitor), and a current mirror to produce a signal proportional to input current. A clamp circuit may control a series pass device to regulate current in response to the proportional signal, or to interrupt current flow in response to an under voltage or over voltage condition or receipt of a signal indicative of a disable state. An enable signal may be summed into a comparator that handles under voltage condition determination.

Abstract: A circuit for generating both a biphasic defibrillation waveform and an external pacing waveform in an external defibrillator is provided. The output circuit of the device utilizes one or more SCR switches for applying energy to a patient. In one embodiment, the output circuit is in the form of an H-bridge, with three SCR legs and one IGBT leg. A drive circuit for one of the SCR legs is provided such that the SCR may be continuously driven on for either a high energy biphasic defibrillation pulse or a low energy pacing pulse. In one embodiment, the output circuit conducts the pacing waveform through a combination of one upper leg SCR of the H-bridge and a current source. The current source is configured to bypass a lower leg SCR of the H-bridge. The output circuit is capable of conducting pacing currents of as low as 10 mA.

Abstract: An external defibrillator with an output circuit having four legs arrayed in the form of an “H” (an “H-bridge”) is disclosed. The output circuit is designed to be able to conduct a range of defibrillation pulse energies, from below 50 joules to above 200 joules. Each leg of the output circuit contains a solid-state switch. By selectively switching on pairs of switches in the H-bridge, a biphasic defibrillation pulse may be applied to a patient. The switches in three of the legs of the H-bridge output circuit are preferably SCR switches, while the fourth leg includes an IGBT switch. In one embodiment, a single power switch is utilized in each of the legs of the H-bridge output circuit, and are included in a single integrated module or package. The use of single semiconductor switches in an integrated surface mountable module or package simplifies the assembly and manufacturing of the defibrillator device.

Abstract: Techniques are described for charging an energy storage device, such as the high-voltage energy storage capacitors of an external defibrillation device, using an average current mode control technique. By controlling the average current in a transformer, energy may be stored rapidly and at controlled energy levels.

Abstract: An external defibrillator with an output circuit having four legs arrayed in the form of an “H” (an “H-bridge”) is disclosed. The output circuit is designed to be able to conduct a range of defibrillation pulse energies, from below 50 joules to above 200 joules. Each leg of the output circuit contains a solid-state switch. By selectively switching on pairs of switches in the H-bridge, a biphasic defibrillation pulse may be applied to a patient. The switches in three of the legs of the H-bridge output circuit are preferably SCR switches, while the fourth leg includes an IGBT switch. In one embodiment, a single power switch is utilized in each of the legs of the H-bridge output circuit, and are included in a single integrated module or package. The use of single semiconductor switches in an integrated surface mountable module or package simplifies the assembly and manufacturing of the defibrillator device.

Abstract: A circuit for generating both a biphasic defibrillation waveform and an external pacing waveform in an external defibrillator is provided. The output circuit of the device utilizes one or more SCR switches for applying energy to a patient. In one embodiment, the output circuit is in the form of an H-bridge, with three SCR legs and one IGBT leg. A drive circuit for one of the SCR legs is provided such that the SCR may be continuously driven on for either a high energy biphasic defibrillation pulse or a low energy pacing pulse. In one embodiment, the output circuit conducts the pacing waveform through a combination of one upper leg SCR of the H-bridge and a current source. The current source is configured to bypass a lower leg SCR of the H-bridge. The output circuit is capable of conducting pacing currents of as low as 10 mA.

Abstract: Techniques are described for charging an energy storage device, such as the high-voltage energy storage capacitors of an external defibrillation device, using an average current mode control technique. By controlling the average current in a transformer, energy may be stored rapidly and at controlled energy levels.