Patents by Inventor Barry J. Male
Barry J. Male has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11303108Abstract: One example includes a relay device that is comprised of a galvanic isolation barrier, a protection control and power extractor, and an electronic switch. The galvanic isolation barrier is coupled to an input of the relay device and receives a switch control signal and outputs another switch control signal. The protection control and power extractor is coupled to an output of the galvanic isolation barrier. The protection control and power extractor extracts power from a power supply coupled to the relay device. The protection control and power extractor is responsive to the other switch control signal and generates a protection signal in response to a determination of an operating parameter of the relay device. The protection control and power extractor further outputs an electronic switch device signal based on the generated protection signal.Type: GrantFiled: May 5, 2020Date of Patent: April 12, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Barry J. Male, Miroslav Oljaca, David W. Stout, Ajinder Singh
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Publication number: 20200335963Abstract: One example includes a relay device that is comprised of a galvanic isolation barrier, a protection control and power extractor, and an electronic switch. The galvanic isolation barrier is coupled to an input of the relay device and receives a switch control signal and outputs another switch control signal. The protection control and power extractor is coupled to an output of the galvanic isolation barrier. The protection control and power extractor extracts power from a power supply coupled to the relay device. The protection control and power extractor is responsive to the other switch control signal and generates a protection signal in response to a determination of an operating parameter of the relay device. The protection control and power extractor further outputs an electronic switch device signal based on the generated protection signal.Type: ApplicationFiled: May 5, 2020Publication date: October 22, 2020Inventors: Barry J. Male, MIROSLAV OLJACA, DAVID W. STOUT, AJINDER SINGH
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Patent number: 10644495Abstract: One example includes a relay device that is comprised of a galvanic isolation barrier, a protection control and power extractor, and an electronic switch. The galvanic isolation barrier is coupled to an input of the relay device and receives a switch control signal and outputs another switch control signal. The protection control and power extractor is coupled to an output of the galvanic isolation barrier. The protection control and power extractor extracts power from a power supply coupled to the relay device. The protection control and power extractor is responsive to the other switch control signal and generates a protection signal in response to a determination of an operating parameter of the relay device. The protection control and power extractor further outputs an electronic switch device signal based on the generated protection signal.Type: GrantFiled: August 29, 2017Date of Patent: May 5, 2020Assignee: Texas Instruments IncorporatedInventors: Barry J. Male, Miroslav Oljaca, David W. Stout, Ajinder Singh
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Publication number: 20190067930Abstract: One example includes a relay device that is comprised of a galvanic isolation barrier, a protection control and power extractor, and an electronic switch. The galvanic isolation barrier is coupled to an input of the relay device and receives a switch control signal and outputs another switch control signal. The protection control and power extractor is coupled to an output of the galvanic isolation barrier. The protection control and power extractor extracts power from a power supply coupled to the relay device. The protection control and power extractor is responsive to the other switch control signal and generates a protection signal in response to a determination of an operating parameter of the relay device. The protection control and power extractor further outputs an electronic switch device signal based on the generated protection signal.Type: ApplicationFiled: August 29, 2017Publication date: February 28, 2019Inventors: Barry J. Male, MIROSLAV OLJACA, DAVID W. STOUT, AJINDER SINGH
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Patent number: 7595644Abstract: An AC generator has a first terminal coupled through an Isolation Loss Detect (ILD) capacitor to the positive bus of a Power-Over-Ethernet (POE) system, and has a second terminal coupled through the primary of a transformer to earth ground. AC current flowing between ground and the positive bus causes a corresponding AC voltage across the secondary of this transformer. The secondary of the transformer is coupled to an AC detector, whose output is coupled to a comparator. The threshold of the comparator is set such that when AC current through the ILD capacitor exceeds a threshold value, an ISOLATION FAULT output is generated by the comparator.Type: GrantFiled: August 14, 2007Date of Patent: September 29, 2009Assignee: Texas Instruments IncorporatedInventor: Barry J. Male
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Publication number: 20090045818Abstract: An AC generator has a first terminal coupled through an Isolation Loss Detect (ILD) capacitor to the positive bus of a Power-Over-Ethernet (POE) system, and has a second terminal coupled through the primary of a transformer to earth ground. AC current flowing between earth ground and the positive bus causes a corresponding AC voltage to be developed across the secondary of this transformer. The secondary of the transformer is coupled to an AC detector, the output of which is coupled to a comparator. The threshold of the comparator is set such that when AC current flow through the ILD capacitor exceeds a value set by this threshold, an ISOLATION FAULT output is generated at the output of the comparator. In normal operation, isolation between earth ground and any conductor in the POE system coupled to the positive bus is high, so little or no AC current flows through the ILD capacitor.Type: ApplicationFiled: August 14, 2007Publication date: February 19, 2009Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Barry J. Male
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Patent number: 6879008Abstract: A Seebeck effect thermal sensor is formed in an integrated fashion with a power-dissipating device such as a power MOSFET. The integrated device generates a temperature difference between a relatively cold peripheral area and a relatively warm central area, the temperature difference having a known relationship to electrical operating conditions of the device. A structure for a power MOSFET includes two side-by-side arrays of source/drain diffusions. The Seebeck sensor has warm junctions at the central area and cold junctions at the peripheral area, and generates an electrical output signal having a known relationship to the temperature difference between the peripheral and central areas to provide an indication of the electrical operating conditions of the device. One Seebeck sensor includes alternating metal and polysilicon traces, wherein the polysilicon traces lie between source and drain diffusions of a power MOSFET just as do active polysilicon gates.Type: GrantFiled: February 17, 2004Date of Patent: April 12, 2005Assignee: Texas Instruments IncorporatedInventor: Barry J. Male
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Publication number: 20040159887Abstract: A Seebeck effect thermal sensor is formed in an integrated fashion with a power-dissipating device such as a power MOSFET. The integrated device generates a temperature difference between a relatively cold peripheral area and a relatively warm central area, the temperature difference having a known relationship to electrical operating conditions of the device. A structure for a power MOSFET includes two side-by-side arrays of source/drain diffusions. The Seebeck sensor has warm junctions at the central area and cold junctions at the peripheral area, and generates an electrical output signal having a known relationship to the temperature difference between the peripheral and central areas to provide an indication of the electrical operating conditions of the device. One Seebeck sensor includes alternating metal and polysilicon traces, wherein the polysilicon traces lie between source and drain diffusions of a power MOSFET just as do active polysilicon gates.Type: ApplicationFiled: February 17, 2004Publication date: August 19, 2004Inventor: Barry J. Male
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Patent number: 6717225Abstract: A Seebeck effect thermal sensor is formed in an integrated fashion with a power-dissipating device such as a power MOSFET. The integrated device generates a temperature difference between a relatively cold peripheral area and a relatively warm central area, the temperature difference having a known relationship to electrical operating conditions of the device. A structure for a power MOSFET includes two side-by-side arrays of source/drain diffusions. The Seebeck sensor has warm junctions at the central area and cold junctions at the peripheral area, and generates an electrical output signal having a known relationship to the temperature difference between the peripheral and central areas to provide an indication of the electrical operating conditions of the device. One Seebeck sensor includes alternating metal and polysilicon traces, wherein the polysilicon traces lie between source and drain diffusions of a power MOSFET just as do active polysilicon gates.Type: GrantFiled: December 11, 2001Date of Patent: April 6, 2004Assignee: Texas Instruments IncorporatedInventor: Barry J. Male
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Patent number: 6597183Abstract: A system is provided for precisely measuring a resistive load embedded in a potentially non-linear and capacitive Powered Device network which eliminates variable voltage from the measurement, decreases the capacitive settling times, and averages out system noise. A current and voltage (I-V) controller receives control voltages, applies constant load voltages to the resistive load in response to receiving the control voltages, and generates current flow voltages corresponding to current flowing through the resistive load. An integrating analog to digital converter (ADC) circuit receives the generated current flow voltages from the I-V controller and performs measurement cycles thereon. A control processor is operatively communicative with both the integrating ADC circuit and the I-V controller for controlling the measurements and calculations on the resistive load during first and second measurement cycles.Type: GrantFiled: December 28, 2001Date of Patent: July 22, 2003Assignee: Texas Instruments IncorporatedInventor: Barry J. Male
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Publication number: 20030122551Abstract: A system is provided for precisely measuring a resistive load embedded in a potentially non-linear and capacitive Powered Device network which eliminates variable voltage from the measurement, decreases the capacitive settling times, and averages out system noise. A current and voltage (I-V) controller receives control voltages, applies constant load voltages to the resistive load in response to receiving the control voltages, and generates current flow voltages corresponding to current flowing through the resistive load. An integrating analog to digital converter (ADC) circuit receives the generated current flow voltages from the I-V controller and performs measurement cycles thereon. A control processor is operatively communicative with both the integrating ADC circuit and the I-V controller for controlling the measurements and calculations on the resistive load during first and second measurement cycles.Type: ApplicationFiled: December 28, 2001Publication date: July 3, 2003Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Barry J. Male
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Publication number: 20030107093Abstract: A Seebeck effect thermal sensor is formed in an integrated fashion with a power-dissipating device such as a power MOSFET. The integrated device generates a temperature difference between a relatively cold peripheral area and a relatively warm central area, the temperature difference having a known relationship to electrical operating conditions of the device. A structure for a power MOSFET includes two side-by-side arrays of source/drain diffusions. The Seebeck sensor has warm junctions at the central area and cold junctions at the peripheral area, and generates an electrical output signal having a known relationship to the temperature difference between the peripheral and central areas to provide an indication of the electrical operating conditions of the device. One Seebeck sensor includes alternating metal and polysilicon traces, wherein the polysilicon traces lie between source and drain diffusions of a power MOSFET just as do active polysilicon gates.Type: ApplicationFiled: December 11, 2001Publication date: June 12, 2003Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Barry J. Male
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Patent number: 6456153Abstract: A regulated integrated circuit power supply (200) intermittently applies feedback to a charge pump (202) on a sampled basis such that a feedback circuit (204) is enabled to sense the bias voltage (Vout) at predetermined intervals of time. Based upon the value of the bias voltage (Vout) as compared to a threshold voltage (VT), the charge pump (202) is enabled to supply a voltage to the integrated circuit. Thereby, the regulated charge pump (202) does not overload the integrated circuit coupled thereto. The regulated integrated circuit power supply (200) includes the charge pump (202) coupled to the integrated circuit to supply bias voltage (Vout). Additionally, coupled to the integrated circuit, the feedback circuit (204) senses the bias voltage (Vout) and provides an output signal based upon a comparison between the bias voltage (Vout) and a voltage threshold (VT) A switch (208) connected to the feedback circuit (204) selectively enables and disables sensing of the bias voltage (Vout).Type: GrantFiled: May 4, 2001Date of Patent: September 24, 2002Assignee: Texas Instruments IncorporatedInventors: Paul E. Buck, Karl H. Jacobs, Barry J. Male
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Publication number: 20010038543Abstract: A regulated integrated circuit power supply (200) intermittently applies feedback to a charge pump (202) on a sampled basis such that a feedback circuit (204) is enabled to sense the bias voltage (Vout) at predetermined intervals of time. Based upon the value of the bias voltage (Vout) as compared to a threshold voltage (VT), the charge pump (202) is enabled to supply a voltage to the integrated circuit. Thereby, the regulated charge pump (202) does not overload the integrated circuit coupled thereto.Type: ApplicationFiled: May 4, 2001Publication date: November 8, 2001Inventors: Paul E. Buck, Karl H. Jacobs, Barry J. Male
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Patent number: 5440153Abstract: A linear, bipolar-type application-specific integrated circuit includes a silicon substrate having a plurality of columns of device primitives or cells. Each cell comprises a plurality of identical NPN and PNP transistors flanking a centrally-located capacitor. Each transistor has dual emitters, bases and collectors. Open field areas are reserved on the silicon substrate on the sides of the columns of cells. Formed in these open field areas are precise thin film silicon chromium resistors. Power planes are also routed in these open field areas. A ground plane is routed in the vicinity of the centrally-located capacitor. Standard analog circuits are personalized using two layers of metallization interconnects.Type: GrantFiled: April 1, 1994Date of Patent: August 8, 1995Assignee: United Technologies CorporationInventors: Barry J. Male, Douglas L. Anneser
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Patent number: 5412328Abstract: The present invention relates to a non-contact current injection apparatus and a method for using the same with linear integrated bipolar circuits. The current injection apparatus has two modes: a calibration mode and an injection mode. The apparatus includes an illumination source for emitting photons toward an electronic component at a desired site for inducing a current in the electronic component. The apparatus further includes a control loop for generating a voltage control signal which causes the illumination source to illuminate to a desired level and a feedback loop which monitors the current induced in the electronic component and compares it or some other end effect to a desired current or end effect. The apparatus also includes a storage device for retaining information about the calibration sequence.Type: GrantFiled: June 29, 1994Date of Patent: May 2, 1995Assignee: United Technologies CorporationInventors: Barry J. Male, Douglas L. Anneser
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Patent number: 5268847Abstract: An apparatus and method for synthesizing waveforms includes digital circuitry (12) designed to provide a predetermined pulse train of data over a serial line (16), such that, when the pulse train is filtered, a synthesized waveform is produced which approaches an ideal analog waveform.Type: GrantFiled: December 17, 1990Date of Patent: December 7, 1993Assignee: United Technologies CorporationInventors: Richard J. Potetz, Barry J. Male