Patents by Inventor Barry L. Chin
Barry L. Chin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7795138Abstract: We disclose a method of depositing a metal seed layer on a wafer substrate comprising a plurality of recessed device features. The method comprises depositing a first portion of the metal seed layer on the wafer via plasma deposition at a sufficient ratio of wafer substrate bias to DC source power that bottom coverage is achieved while resputtering of surfaces of the recessed device features is inhibited. The method also comprises depositing a second portion of the metal seed layer at a ration of substrate RF bias to DC source power such that resputtering is not inhibited.Type: GrantFiled: June 25, 2009Date of Patent: September 14, 2010Assignee: Applied Materials, Inc.Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Publication number: 20100099270Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.Type: ApplicationFiled: December 23, 2009Publication date: April 22, 2010Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
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Patent number: 7687909Abstract: A metal/metal nitride barrier layer for semiconductor device applications. The barrier layer is particularly useful in contact vias where high conductivity of the via is important, and a lower resistivity barrier layer provides improved overall via conductivity.Type: GrantFiled: May 30, 2007Date of Patent: March 30, 2010Assignee: Applied Materials, Inc.Inventors: Peijun Ding, Zheng Xu, Hong Zhang, Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John C. Forster, Jianming Fu, Tony Chiang, Gongda Yao, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara
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Patent number: 7660644Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.Type: GrantFiled: June 12, 2006Date of Patent: February 9, 2010Assignee: Applied Materials, Inc.Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
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Publication number: 20090269922Abstract: We disclose a method of depositing a metal seed layer on a wafer substrate comprising a plurality of recessed device features. The method comprises depositing a first portion of the metal seed layer on the wafer via plasma deposition at a sufficient ratio of wafer substrate bias to DC source power that bottom coverage is achieved while resputtering of surfaces of the recessed device features is inhibited. The method also comprises depositing a second portion of the metal seed layer at a ration of substrate RF bias to DC source power such that resputtering is not inhibited.Type: ApplicationFiled: June 25, 2009Publication date: October 29, 2009Applicant: Applied Materials, Inc.Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Patent number: 7589016Abstract: A method of applying a sculptured copper seed layer on a semiconductor feature surface using ion deposition sputtering. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material.Type: GrantFiled: March 10, 2008Date of Patent: September 15, 2009Assignee: Applied Materials, Inc.Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Publication number: 20090053888Abstract: A method of depositing a duffusion barrier layer with overlying conductive layer or fill which lowers resistivity of a semiconductor device interconnect. The lower resistivity is achieved by inducing the formation of alpha tantalum within a tantalum-comprising barrier layer.Type: ApplicationFiled: October 20, 2008Publication date: February 26, 2009Inventors: Peijun Ding, Zheng Xu, Hong Zhang, Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John C. Forster, Jianming Fu, Tony Chiang, Gongda Yao, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara
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Publication number: 20080166869Abstract: A method of applying a sculptured copper seed layer on a semiconductor feature surface using ion deposition sputtering. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material.Type: ApplicationFiled: March 10, 2008Publication date: July 10, 2008Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Patent number: 7381639Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces.Type: GrantFiled: June 9, 2006Date of Patent: June 3, 2008Assignee: Applied Materials, Inc.Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Patent number: 7253109Abstract: We have discovered a method of providing a thin, approximately from about 2 ? to about 100 ? thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the TaN seed layer exhibits low resistivity, in the range of 30 ??cm and can be used as a low resistivity barrier layer in the absence of an alpha tantalum layer. In one embodiment of the method, a TaN film is altered on its surface to form the TaN seed layer. In another embodiment of the method, a Ta film is altered on its surface to form the TaN seed layer.Type: GrantFiled: February 28, 2005Date of Patent: August 7, 2007Assignee: Applied Materials, Inc.Inventors: Peijun Ding, Zheng Xu, Hong Zhang, Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John C. Forster, Jianming Fu, Tony Chiang, Gongda Yao, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara
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Patent number: 7085616Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.Type: GrantFiled: July 27, 2001Date of Patent: August 1, 2006Assignee: Applied Materials, Inc.Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
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Patent number: 7081271Abstract: Embodiments of the invention relate to an apparatus and method of cyclical layer deposition utilizing three or more precursors. In one embodiment, the method includes providing at least one cycle of precursors to form a ternary material layer. Providing at least one cycle of precursors includes introducing a pulse of a first precursor, introducing a pulse of a second precursor, and introducing a pulse of a third precursor, wherein the pulses of two of the three precursors are introduced simultaneously or sequentially. In another embodiment, the method includes introducing a pulse of a first precursor, introducing a pulse of a second precursor, repeating the introduction of the first and the second precursors at least one time to form a binary material layer on the substrate surface, and introducing a pulse of a third precursor to form the ternary material layer.Type: GrantFiled: July 18, 2002Date of Patent: July 25, 2006Assignee: Applied Materials, Inc.Inventors: Hua Chung, Ling Chen, Barry L. Chin
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Patent number: 7074714Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces.Type: GrantFiled: November 3, 2004Date of Patent: July 11, 2006Assignee: Applied Materials, Inc.Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Patent number: 7048837Abstract: Plasma etching or resputtering of a layer of sputtered materials including opaque metal conductor materials may be controlled in a sputter reactor system. In one embodiment, resputtering of a sputter deposited layer is performed after material has been sputtered deposited and while additional material is being sputter deposited onto a substrate. A path positioned within a chamber of the system directs light or other radiation emitted by the plasma to a chamber window or other optical view-port which is protected by a shield against deposition by the conductor material. In one embodiment, the radiation path is folded to reflect plasma light around the chamber shield and through the window to a detector positioned outside the chamber window.Type: GrantFiled: September 11, 2003Date of Patent: May 23, 2006Assignee: Applied Materials, Inc.Inventors: Sasson R. Somekh, Marc O. Schweitzer, John C. Forster, Zheng Xu, Roderick C. Mosely, Barry L. Chin, Howard E. Grunes
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Patent number: 6919275Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces.Type: GrantFiled: March 8, 2004Date of Patent: July 19, 2005Assignee: Applied Materials, Inc.Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Patent number: 6887353Abstract: Disclosed herein is a barrier layer structure useful in forming copper interconnects and electrical contacts of semiconductor devices. The barrier layer structure comprises a first layer of TaNx which is applied directly over the substrate, followed by a second layer of Ta. The TaNx/Ta barrier layer structure provides both a barrier to the diffusion of a copper layer deposited thereover, and enables the formation of a copper layer having a high <111> crystallographic content so that the electromigration resistance of the copper is increased. The TaNx layer, where x ranges from about 0.1 to about 1.5, is sufficiently amorphous to prevent the diffusion of copper into the underlying substrate, which is typically silicon or a dielectric such as silicon dioxide.Type: GrantFiled: December 19, 1997Date of Patent: May 3, 2005Assignee: Applied Materials, Inc.Inventors: Peijun Ding, Tony Chiang, Barry L. Chin
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Patent number: 6793779Abstract: A method of filling trenches or vias on a semiconductor workpiece surface with copper using sputtering techniques. A copper wetting layer and a copper fill layer may both be applied by sputtering techniques. The thin wetting layer of copper is applied at a substrate surface temperature ranging between about 20° C. to about 250° C., and subsequently the temperature of the substrate is increased, with the application of the sputtered copper fill layer beginning at above at least about 200° C. and continuing while the substrate temperature is increased to a temperature as high as about 600° C. Preferably the substrate temperature during application of the sputtered fill layer ranges between about 300° C. and about 500° C.Type: GrantFiled: February 20, 2003Date of Patent: September 21, 2004Assignee: Applied Materials, Inc.Inventors: Peijun Ding, Tony Chiang, Barry L. Chin
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Publication number: 20040171250Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of: a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper.Type: ApplicationFiled: March 8, 2004Publication date: September 2, 2004Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Patent number: 6758947Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces.Type: GrantFiled: June 20, 2001Date of Patent: July 6, 2004Assignee: Applied Materials, Inc.Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
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Patent number: 6753248Abstract: A method for processing a substrate. The method generally includes forming a copper interconnect in a sacrificial layer deposited on the substrate by patterning the sacrifical layer to form an interconnect and filling the interconnect with copper. The method additionally includes removing at least a portion of the sacrificial layer upon copper interconnect formation, depositing a barrier layer on the copper interconnect, and depositing a dielectric layer on the barrier layer.Type: GrantFiled: January 27, 2003Date of Patent: June 22, 2004Assignee: Applied Materials, Inc.Inventors: Michael Wood, Barry L. Chin, Paul F. Smith, Robin Cheung