Abstract: A secondary storage facility having a drive and a controller employing multiple error recovery techniques; the controller signals the drive to try such techniques in sequence, according to descending a priori probability of success. The controller does not know or need to know the details of the error recovery procedures.

Abstract: In a system including a plurality of mass storage devices at least one of which includes first and second ports, a plurality of controllers and cables coupling the ports to various ones of the controllers and in which each device can only be on-line through one port at a time, state information is sent from the on-line port of each device to a first controller to which it is coupled until a predetermined command from the controller to the on-line port is sent by the first controller. The device responds to the predetermined command by discontinuing the sending of state information from the on-line port to the first controller, and sending a state available signal from the other port to the second controller while maintaining the actual state of said device unchanged, permitting the other controller to interrogate the device as an aid in determining system topology.

Abstract: In a data processing system including a host computer and a secondary storage system that includes a controller and a mass storage device, the device stores information regarding the physical and logical characteristics of a disk drive associated with the device. In response to a command from the controller, the device produces a signal or signals which provide information to the controller regarding the physical and logical characteristics of the disk drive. The physical and logical characteristics include the drive bit transfer rate and subunit characteristics.

Abstract: A radial bus for use in a secondary storage subsystem, between a mass storage drive and controller. The bus has four unidirectional bit-serial channels, two for carrying signals from drive to controllers. One channel carries real-time drive state information to the controller; another carries real-time controller state information to the drive. The state information is a sequence of multiplexed bits sent in continuous repetition. Most status variables are represented as a single bit in a specific place in the sequence; the set of status variables defining drive state or controller state, as the case may be, is thus provided by a sequence of bits. When such a bit changes state, a potential change of status has occurred; the change is required to persist some number of repetition of the sequence before the state change is recognized, to avoid spuriously signalling a state change.

Abstract: A control arrangement for coordinating operations of multiple processors in a multiprocessor system in response to a command. Each command is associated with a route comprising a sequence of route vectors, each identifying an operation to be performed to execute the command, as well as the process, or station, to execute the route vector. In response to the receipt of a command, a control block is generated identifying the first route vector in the route associated with the command. Each station has a work queue containing control blocks, which the station retrieves and processes sequentially. The control block is first sent to the work queue of the station to perform the first operation. When the station gets to the control block, it performs the operation required by the route vector, modifies the control block to identify the next route vector in the sequence, and transfers the control block to the work queue of the station to perform the operation required by the next route vector in the route.

Abstract: An interface mechanism (10) between two processors, such as a host processor (70) and a processor (31) in an intelligent controller (30) for mass storage devices (40), and utilizing a set of data structures employing a dedicated communications region (80A) in host memory (80). Interprocessor commands and responses are communicated as packets over an I/O bus (60) of the host (70), to and from the communication region (80A), through a pair of ring-type queues (80D) and (80E). The entry of each ring location (e.g., 132, 134, 136, 138) points to another location in the communications region where a command or response is placed. The filling and emptying of ring entries (132-138) is controlled through the use of an `ownership` byte or bit (278) associated with each entry. The ownership bit (278) is placed in a first state when the message source (70 or 31) has filled the entry and in a second state when the entry has been emptied.

Abstract: In a disk mass storage facility for data processing systems, a disk format which improves handling of defective segments of medium and reduces access time. The format has three layers. A first, physical layer comprises the bytes, sectors and collections of sectors, as well as error detection and correction codes. A second, logical layer is used to address the physical layer and to collect together sectors to form a multiplicity of separately addressable spaces, with each space having a distinct functional utility. At a third, functional layer the use of data fields in each space is specified. This layer governs the handling of bad blocks if required, and the use of certain format information. Handling of bad blocks is controlled by a hierarchically layered process. A portion of each disc, distributed across the medium, is reserved as spare sectors to replace defective sectors. After a bad sector is replaced, future attempts to access the bad sector are redirected (i.e., revectored) to the replacement sector.