Patents by Inventor Barry Saville

Barry Saville has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220307990
    Abstract: A die screening system may receive die-resolved metrology data for a population of dies on one or more samples from the one or more in-line metrology tools after one or more fabrication steps, where the die-resolved metrology data includes images generated using one or more measurement configurations of the one or more in-line metrology tools. In this way, the die-resolved metrology data provides many measurement channels per die, where a particular measurement channel includes data from a particular pixel of a particular image. The controller may then generate screening data for the population of dies from the die-resolved metrology data, where the screening data includes a subset of the plurality of measurement channels of the die-resolved metrology data, and screen the plurality of dies into two or more disposition classes including at least outlier dies based on variability in the screening data.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 29, 2022
    Inventors: John Charles Robinson, Stilian Pandev, Shifang Li, Mike Von Den Hoff, Justin Lach, Barry Saville, David W. Price, Robert J. Rathert, Chet V. Lenox, Thomas Groos, Oreste Donzella
  • Publication number: 20220196723
    Abstract: Automatically identifying defect-based test coverage gaps in semiconductor devices includes determining a plurality of apparent killer defects on one or more semiconductor devices with a plurality of semiconductor dies based on characterization measurements of the one or more semiconductor devices acquired by one or more semiconductor fabrication subsystems, determining at least one semiconductor die which passes at least one test based on test measurements acquired by one or more test tool subsystems, correlate the characterization measurements with the test measurements to determine at least one apparent killer defect on the at least one semiconductor die which passes the at least one test, and determining one or more gap areas on the one or more semiconductor devices for defect-based test coverage based on the at least one apparent killer defect on the at least one semiconductor die which passes the at least one test.
    Type: Application
    Filed: May 14, 2021
    Publication date: June 23, 2022
    Inventors: David W. Price, Robert J. Rathert, Chet V. Lenox, Kara L. Sherman, Teng Song Lim, Thomas Groos, Mike Von Den Hoff, Oreste Donzella, Narayani Narasimhan, Barry Saville, Justin Lach, John Robinson
  • Patent number: 11293970
    Abstract: An inspection system may include a controller communicatively coupled to one or more in-line sample analysis tools including, but not limited to, an inspection tool or a metrology tool. The controller may identify defects in a population of dies based on data received from at least one of the one or more in-line sample analysis tools, assign weights to the identified defects indicative of predicted impact of the identified defects on reliability of the dies using a weighted defectivity model, generate defectivity scores for the dies in the population by aggregating the weighted defects in the respective dies in the population, and determine a set of outlier dies based on the defectivity scores for the dies in the population, wherein at least some of the set of outlier dies are isolated from the population.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: April 5, 2022
    Assignee: KLA Corporation
    Inventors: David W. Price, Robert J. Rathert, Kara L. Sherman, John Charles Robinson, Mike Von Den Hoff, Barry Saville, Robert Cappel, Oreste Donzella, Naema Bhatti, Thomas Groos, Teng-Song Lim, Doug Sutherland
  • Publication number: 20210215753
    Abstract: An inspection system may include a controller communicatively coupled to one or more in-line sample analysis tools including, but not limited to, an inspection tool or a metrology tool. The controller may identify defects in a population of dies based on data received from at least one of the one or more in-line sample analysis tools, assign weights to the identified defects indicative of predicted impact of the identified defects on reliability of the dies using a weighted defectivity model, generate defectivity scores for the dies in the population by aggregating the weighted defects in the respective dies in the population, and determine a set of outlier dies based on the defectivity scores for the dies in the population, wherein at least some of the set of outlier dies are isolated from the population.
    Type: Application
    Filed: November 23, 2020
    Publication date: July 15, 2021
    Applicant: KLA Corporation
    Inventors: David W. Price, Robert J. Rathert, Kara L. Sherman, John Charles Robinson, Mike Von Den Hoff, Barry Saville, Robert Cappel, Oreste Donzella, Naema Bhatti, Thomas Groos, Teng-Song Lim, Doug Sutherland
  • Patent number: 10223492
    Abstract: The process for design based assessment includes the following steps. First, the process defines multiple patterns of interest (POIs) utilizing design data of a device and then generates a design based classification database. Further, the process receives one or more inspection results. Then, the process compares the inspection results to each of the plurality of POIs in order to identify occurrences of the POIs in the inspection results. In turn, the process determines yield impact of each POI utilizing process yield data and monitors a frequency of occurrence of each of the POIs and the criticality of the POIs in order to identify process excursions of the device. Finally, the process determines a device risk level by calculating a normalized polygon frequency for the device utilizing a frequency of occurrence for each of the critical polygons and a criticality for each of the critical polygons.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: March 5, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Allen Park, Youseung Jin, Sungchan Cho, Barry Saville
  • Patent number: 8656323
    Abstract: The process for designed based assessment includes the following steps. First, the process defines multiple patterns of interest (POIs) utilizing design data of a device and then generates a design based classification database. Further, the process receives one or more inspection results. Then, the process compares the inspection results to each of the plurality of POIs in order to identify occurrences of the POIs in the inspection results. In turn, the process determines yield impact of each POI utilizing process yield data and monitors a frequency of occurrence of each of the POIs and the criticality of the POIs in order to identify process excursions of the device. Finally, the process determines a device risk level by calculating a normalized polygon frequency for the device utilizing a frequency of occurrence for each of the critical polygons and a criticality for each of the critical polygons.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: February 18, 2014
    Assignee: KLA-Tencor Corporation
    Inventors: Allen Park, Youseung Jin, SungChan Cho, Barry Saville
  • Publication number: 20120216169
    Abstract: The present invention includes defining a multiple patterns of interest utilizing design data of the device; generating a design based classification database, the DBC database including design data associated with each of the POIs; receiving one or more inspection results; comparing the inspection results to each of the plurality of POIs in order to identify an occurrence of at least one of the POIs in the inspection results; determining yield impact of each POI utilizing process yield data; monitoring a frequency of occurrence of each of the POIs and the criticality of the POIs in order to identify process excursions of the device; and determining a device risk level by calculating a normalized polygon frequency for the device utilizing a frequency of occurrence for each of the critical polygons and a criticality for each of the critical polygons, the critical polygons defined utilizing design data of the device.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 23, 2012
    Applicant: KLA-TENCOR CORPORATION
    Inventors: Allen Park, Youseung Jin, SungChan Cho, Barry Saville