Patents by Inventor Bart C. Vandebroek

Bart C. Vandebroek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5488331
    Abstract: A high-power radio-frequency amplifier acts on periodic pulses of RF energy. The bias is controlled for each of a bank of FETs or other amplifier devices that constitutes the main power stage. A sample of bias current is obtained during a blanking period on the front porch of the RF gating period. Quiescent drain current is measured, and stored on a sample/hold circuit. A digital signal processor provides bias values that are sent via a D/A converter to biasing circuits that add the bias levels to the input RF signal. If the bias current is above or below a desired level, the stored bias level is decreased or incremented respectively. A timing control circuit gates the sample/hold circuit and switches in advance of the biasing circuits. The timing control circuit also creates a blanking signal to apply to an attenuator to produce a null region during the first 100 microseconds of the gating signal.
    Type: Grant
    Filed: April 7, 1995
    Date of Patent: January 30, 1996
    Assignee: ENI, A Div. of Astec America, Inc.
    Inventors: Anthony R. A. Keane, Bart C. Vandebroek
  • Patent number: 5451907
    Abstract: A high-power radio-frequency amplifier act on periodic pulses of RF energy. The bias is controlled for each of a bank of FETs or other amplifier devices that constitutes the main power stage. A sample of bias current is obtained during a blanking period on the front porch of the RF gating period. Quiescent drain current is measured, and stored on a sample/hold circuit. A digital signal processor provides bias values that are sent via a D/A converter to biasing circuits that add the bias levels to the input RF signal. If the bias current is above or below a desired level, the stored bias level is decreased or incremented respectively. A timing control circuit gates the sample/hold circuit and switches in advance of the biasing circuits. The timing control circuit also creates a blanking signal to apply to an attenuator to produce a null region during the first 100 microseconds of the gating signal.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: September 19, 1995
    Assignee: ENI, Div. of Astec America, Inc.
    Inventors: Anthony R. A. Keane, Bart C. Vandebroek
  • Patent number: 5249141
    Abstract: The present invention relates to the protection of a semiconductor active device from thermal breakdown without actually measuring the temperature of the semiconductor active device. Instead, the present invention measures the magnitude of the forward electrical signal generated by the active device and the reflected electrical signal resulting from the interaction of the forward electrical signal and a load. The thermal energy generated by the active device is a function of these electrical signals. The generated thermal energy is transferred out of the active device at a predetermined rate. The temperature of the active device is calculated as a function of the thermal energy generated by the active device and the amount of thermal energy transferred out of the active device. When the calculated temperature is above a predetermined value, the active device is shut off, thereby preventing further generation of thermal energy.
    Type: Grant
    Filed: October 24, 1990
    Date of Patent: September 28, 1993
    Assignee: Astec America, Inc.
    Inventors: Bart C. Vandebroek, Anthony R. Keane