Patents by Inventor Bart Desoete

Bart Desoete has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Deep trench isolation for power semiconductors
    Patent number: 7723800
    Abstract: An integrated power semiconductor device has an isolation structure having two or more isolation trenches, and one or more regions in between the isolation trenches, and a bias arrangement coupled to the regions to divide a voltage across the isolation structure between the isolation trenches. By dividing the voltage, the reverse breakdown voltage characteristics such as voltage level, reliability and stability can be improved for a given area of device, or for a given complexity of device, and avalanche breakdown at weaknesses in isolation structures can be reduced or avoided.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: May 25, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Peter Moens, Bart Desoete
  • DEEP TRENCH ISOLATION FOR POWER SEMICONDUCTORS
    Publication number: 20080290461
    Abstract: An integrated power semiconductor device has an isolation structure having two or more isolation trenches, and one or more regions in between the isolation trenches, and a bias arrangement coupled to the regions to divide a voltage across the isolation structure between the isolation trenches. By dividing the voltage, the reverse breakdown voltage characteristics such as voltage level, reliability and stability can be improved for a given area of device, or for a given complexity of device, and avalanche breakdown at weaknesses in isolation structures can be reduced or avoided.
    Type: Application
    Filed: May 23, 2008
    Publication date: November 27, 2008
    Applicant: AMI Semiconductor Belgium BVBA
    Inventors: Peter Moens, Bart Desoete